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Browsing "Department of Electrical & Electronic Engineering" by Author sin, jko
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Showing results 1 to 20 of 30
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Title
Author(s)
Issue Date
Adaptive High-Bandwidth Digitally Controlled Buck Converter with Improved Line and Load Transient Response
Journal:
IET Power Electronics
Lee, ATL
Sin, JKO
Chan, PCH
2014
BaTiO3 as Charge-Trapping Layer for Nonvolatile Memory Applications
Journal:
Solid State Electronics
HUANG, X
Sin, JKO
Lai, PT
2013
Charge-Trapping Characteristics of Ga2O3 Nanocrystals for Nonvolatile Memory Applications
Journal:
ECS Solid State Letters
HUANG, X
Lai, PT
Sin, JKO
2012
Cost-effective and eco-friendly LED System-on-a-Chip
Proceeding/Conference:
CHINASSL 2013
Lau, KM
Choi, HW
Ki, WH
Lee, RSW
Mok, PKT
Sin, JKO
Yue, CP
2013
Enhanced reliability for low-temperature gate dielectric of MOS devices by N2O or NO plasma nitridation
Journal:
Microelectronics Reliability
Or, DCT
Lai, PT
Sin, JKO
Kwok, PCK
Xu, JP
2003
A Fast Switching Insulated-Gate P-I-N Diode Controlled Thyristor Structure
Proceeding/Conference:
I E E E International Conference on Semiconductor Electronics Proceedings
Jun, C
Sin, JKO
Poon, MC
Ng, WT
Lai, PT
1996
Fluorinated SrTiO3 as charge-trapping layer for nonvolatile memory applications
Journal:
IEEE Transactions on Electron Devices
Huang, XD
Sin, JKO
Lai, PT
2011
Ga2O3(Gd2O3) as a Charge-Trapping Layer for Nonvolatile Memory Applications
Journal:
IEEE Transactions on Nanotechnology
Huang, X
Sin, JKO
Lai, PT
2013
High-temperature thermal sensor based on ultra-thin silicon film for ultra-low-power applications
Journal:
Solid-State Electronics
Li, B
Wu, ZH
Lai, PT
Sin, JKO
Liu, BY
Zheng, XR
2003
Improved Charge-Trapping Characteristics of BaTiO3 by Zr Doping for Nonvolatile Memory Applications
Journal:
IEEE Electron Device Letters
Huang, X
Sin, JKO
Lai, PT
2013
Improved Charge-Trapping Characteristics of ZrO2 by Al Doping for Nonvolatile Memory Applications
Journal:
IEEE Transactions on Device and Materials Reliability
HUANG, X
SHI, R
Sin, JKO
Lai, PT
2016
Improved reliability for gate dielectric of low-temperature polysilicon thin-film transistors by NO-plasma nitridation
Journal:
Solid-State Electronics
Or, DCT
Lai, PT
Sin, JKO
Xu, JP
2003
Latch-up characteristics of a trench-gate conductivity modulated power transistor
Proceeding/Conference:
IEEE Region International Conference on Microelectronics and VLSI Proceedings
Jun, C
Sin, JKO
Ng, WT
Lai, PT
1995
LaTiON/LaON as band-engineered charge-trapping layer for nonvolatile memory applications
Journal:
Applied Physics A: Materials Science and Processing
Huang, XD
Lai, PT
Sin, JKO
2012
Nb-doped Ga2O3 as charge-trapping layer for nonvolatile memory applications
Journal:
Microelectronics Reliability
SHI, R
Huang, XD
Sin, JKO
Lai, PT
2016
Nb-doped Gd2O3 as charge-trapping layer for nonvolatile memory applications
Journal:
Applied Physics Letters
SHI, R
HUANG, X
Sin, JKO
Lai, PT
2015
Nb-Doped La2O3 as Charge-Trapping Layer for Nonvolatile Memory Applications
Journal:
IEEE Transactions on Device and Materials Reliability
Shi, RP
Huang, XD
Leung, CH
Sin, JKO
Lai, PT
2015
A new high-temperature thermal sensor based on large-grain polysilicon on insulator
Journal:
Sensors and Actuators, A: Physical
Wu, ZH
Lai, PT
Sin, JKO
2006
A new lateral trench-gate conductivity modulated power transistor
Journal:
IEEE Transactions on Electron Devices
Cai, J
Sin, JKO
Mok, PKT
Ng, WT
Lai, PT
1999
Nitrided La2O3 as charge-trapping layer for nonvolatile memory applications
Journal:
IEEE Transactions on Device and Materials Reliability
Huang, XD
Sin, JKO
Lai, PT
2012
