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Showing results 1 to 14 of 14

	Title	Author(s)	Issue Date
	Ab Initio Computational Screening and Performance Assessment of van der Waals and Semimetallic Contacts to Monolayer WSe<inf>2</inf>P-Type Field-Effect Transistors Journal:IEEE Transactions on Electron Devices	Yang, Ning Lin, Yuxuan Cosmi Chuu, Chih Piao Rahman, M. Saifur Wu, Tong Chou, Ang Sheng Chen, Hung Yu Woon, Wei Yen Liao, Szuya Sandy Huang, Shengxi Qian, Xiaofeng Guo, Jing Radu, Iuliana Wong, H. S.Philip Wang, Han	2023
	Antimony Semimetal Contact with Enhanced Thermal Stability for High Performance 2D Electronics Proceeding/Conference:Technical Digest - International Electron Devices Meeting, IEDM	Chou, Ang Sheng Wu, Tong Cheng, Chao Ching Zhan, Shun Siang Ni, I. Chih Wang, Shih Yun Chang, Yu Chen Liew, San Lin Chen, Edward Chang, Wen Hao Wu, Chih I.Cai, Jin Wong, H. S.Philip Wang, Han	2021
	Bandgap Extraction at 10 K to Enable Leakage Control in Carbon Nanotube MOSFETs Journal:IEEE Electron Device Letters	Lin, Qing Pitner, Gregory Gilardi, Carlo Su, Sheng Kai Zhang, Zichen Chen, Edward Bandaru, Prabhakar Kummel, Andrew Wang, Han Passlack, Matthias Mitra, Subhasish Wong, H. S.Philip	2022
	Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS<inf>2</inf> Channel Directly Grown on SiO<inf>x</inf>/Si Substrates Using Area-Selective CVD Technology Journal:IEEE Transactions on Electron Devices	Chung, Yun Yan Shieh, Jia Min Su, Sheng Kai Chiang, Hung Li Chen, Tzu Chiang Li, Lain Jong Wong, H. S.Philip Jian, Wen Bin Chien, Chao Hsin Lu, Kuan Cheng Cheng, Chao Ching Li, Ming Yang Lin, Chao Ting Li, Chi Feng Chen, Jyun Hong Lai, Tung Yen Li, Kai Shin	2019
	First demonstration of 40-nm channel length top-gate WS<inf>2</inf> pFET using channel area-selective CVD growth directly on SiO<inf>x</inf>/Si substrate Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology	Cheng, Chao Ching Chung, Yun Yan Li, Uing Yang Lin, Chao Ting Li, Chi Feng Chen, Jyun Hong Lai, Tung Yen Li, Kai Shin Shieh, Jia Min Su, Sheng Kai Chiang, Hung Li Chen, Tzu Chiang Li, Lain Jong Wong, H. S.Philip Chien, Chao Hsin	2019
	Graphene and two-dimensional materials for silicon technology Journal:Nature	Akinwande, Deji Huyghebaert, Cedric Wang, Ching Hua Serna, Martha I.Goossens, Stijn Li, Lain Jong Wong, H. S.Philip Koppens, Frank H.L.	2019
	High On-Current 2D nFET of 390 \mu A/\mu m at V_{DS = 1V using Monolayer CVD MoS2 without Intentional Doping Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology	Chou, Ang Sheng Shen, Pin Chun Cheng, Chao Ching Lu, Li Syuan Chueh, Wei Chen Li, Ming Yang Pitner, Gregory Chang, Wen Hao Wu, Chih I.Kong, Jing Li, Lain Jong Wong, H. S.Philip	2020
	How 2D semiconductors could extend Moore’s law Journal:Nature	Li, Ming Yang Su, Sheng Kai Wong, H. S.Philip Li, Lain Jong	2019
	Monolithic Heterogeneous Integration of BEOL Power Gating Transistors of Carbon Nanotube Networks with FEOL Si Ring Oscillator Circuits Proceeding/Conference:Technical Digest - International Electron Devices Meeting, IEDM	Cheng, Chao Ching Li, Lain Jong Wong, H. S.Philip Lu, Chun Chieh Chao, Tsu Ang Chou, Ang Sheng Chiang, Hung Li Chen, Tzu Chiang Gao, Tianqi Zhao, Jianwen Cui, Zheng	2019
	Perspective on Low-dimensional Channel Materials for Extremely Scaled CMOS Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology	Su, Sheng Kai Chen, Edward Hung, Terry Y.T.Li, Meng Zhan Pitner, Gregory Cheng, Chao Ching Wang, Han Cai, Jin Wong, H. S.Philip Radu, Iuliana P.	2022
	pMOSFET with CVD-grown 2D semiconductor channel enabled by ultra-thin and fab-compatible spacer doping Proceeding/Conference:Technical Digest - International Electron Devices Meeting, IEDM	Hung, Terry Y.T.Li, Meng Zhan Yun, Wei Sheng Chou, Sui An Su, Sheng Kai Chen, Edward Liew, San Lin Yang, Ying Mei Lin, Kuang I.Hou, Vincent Lee, T. Y.Wang, Han Cheng, Albert Lin, Minn Tsong Wong, H. S.Philip Radu, Iuliana P.	2022
	Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS<inf>2</inf> Journal:ACS Nano	Sun, Zheng Pang, Chin Sheng Wu, Peng Hung, Terry Y.T.Li, Ming Yang Liew, San Lin Cheng, Chao Ching Wang, Han Wong, H. S.Philip Li, Lain Jong Radu, Iuliana Chen, Zhihong Appenzeller, Joerg	2022
	Wafer-Scale Bi-Assisted Semi-Auto Dry Transfer and Fabrication of High-Performance Monolayer CVD WS<inf>2</inf>Transistor Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology	Li, Ming Yang Hsu, Ching Hao Shen, Shin Wei Chou, Ang Sheng Lin, Yuxuan Cosmi Chuu, Chih Piao Yang, Ning Chou, Sui An Huang, Lin Yun Cheng, Chao Ching Woon, Wei Yen Liao, Szuya Wu, Chih I.Li, Lain Jong Radu, Iuliana Wong, H. S.Philip Wang, Han	2022
	Wafer-scale single-crystal hexagonal boron nitride monolayers on Cu (111) Journal:Nature	Chen, Tse An Chuu, Chih Piao Tseng, Chien Chih Wen, Chao Kai Wong, H. S.Philip Pan, Shuangyuan Li, Rongtan Chao, Tzu Ang Chueh, Wei Chen Zhang, Yanfeng Fu, Qiang Yakobson, Boris I.Chang, Wen Hao Li, Lain Jong	2020

Showing results 1 to 14 of 14