Showing results 2 to 8 of 8
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| Title | Author(s) | Issue Date | Views | |
|---|---|---|---|---|
Demonstration of 40-nm Channel Length Top-Gate p-MOSFET of WS<inf>2</inf> Channel Directly Grown on SiO<inf>x</inf>/Si Substrates Using Area-Selective CVD Technology Journal:IEEE Transactions on Electron Devices | 2019 | 7 | ||
| 2019 | 6 | |||
First demonstration of 40-nm channel length top-gate WS<inf>2</inf> pFET using channel area-selective CVD growth directly on SiO<inf>x</inf>/Si substrate Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology | 2019 | |||
MoS<inf>2</inf> U-shape MOSFET with 10 nm channel length and poly-Si source/drain serving as seed for full wafer CVD MoS<inf>2</inf> availability Proceeding/Conference:Digest of Technical Papers - Symposium on VLSI Technology | 2016 | |||
| 2020 | 6 | |||
| 2019 | ||||
TMD FinFET with 4 nm thin body and back gate control for future low power technology Proceeding/Conference:International Electron Devices Meeting (IEDM) | 2015 |