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Conference Paper: FPGA-based high-speed true random number generator for cryptographic applications

TitleFPGA-based high-speed true random number generator for cryptographic applications
Authors
Kwok, SHMLam, EY
KeywordsField programmable gate array (FPGA)
Random number test
True random number generator (TRNG)
Issue Date2007
Citation
Ieee Region 10 Annual International Conference, Proceedings/Tencon, 2007 How to Cite?
DOI: http://dx.doi.org/10.1109/TENCON.2006.344013
AbstractRandom number generator is a key primitive in cryptographic algorithms and applications. In this paper, we propose an architecture to implement a high-speed and high-quality true random number generator, which can be used as FPGA-based cryptographic hardware cores. By implementing the proposed generator in Xilinx Vertex II Pro FPGA and testing the output random bit stream using NIST and Diehard random number test suites, we prove that the proposed generator can be implemented effectively in FPGA with very high output rate and strong randomness. © 2006 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/98913
References
References in Scopus

 

DC FieldValueLanguage
dc.contributor.authorKwok, SHMen_HK
dc.contributor.authorLam, EYen_HK
dc.date.accessioned2010-09-25T18:07:40Z-
dc.date.available2010-09-25T18:07:40Z-
dc.date.issued2007en_HK
dc.identifier.citationIeee Region 10 Annual International Conference, Proceedings/Tencon, 2007en_HK
dc.identifier.urihttp://hdl.handle.net/10722/98913-
dc.description.abstractRandom number generator is a key primitive in cryptographic algorithms and applications. In this paper, we propose an architecture to implement a high-speed and high-quality true random number generator, which can be used as FPGA-based cryptographic hardware cores. By implementing the proposed generator in Xilinx Vertex II Pro FPGA and testing the output random bit stream using NIST and Diehard random number test suites, we prove that the proposed generator can be implemented effectively in FPGA with very high output rate and strong randomness. © 2006 IEEE.en_HK
dc.languageengen_HK
dc.relation.ispartofIEEE Region 10 Annual International Conference, Proceedings/TENCONen_HK
dc.subjectField programmable gate array (FPGA)en_HK
dc.subjectRandom number testen_HK
dc.subjectTrue random number generator (TRNG)en_HK
dc.titleFPGA-based high-speed true random number generator for cryptographic applicationsen_HK
dc.typeConference_Paperen_HK
dc.identifier.emailLam, EY:elam@eee.hku.hken_HK
dc.identifier.authorityLam, EY=rp00131en_HK
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/TENCON.2006.344013en_HK
dc.identifier.scopuseid_2-s2.0-34547611725en_HK
dc.identifier.hkuros125270en_HK
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-34547611725&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.scopusauthoridKwok, SHM=36175807000en_HK
dc.identifier.scopusauthoridLam, EY=7102890004en_HK

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