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Conference Paper: Building high performance transistors on carbon nanotube channel
Title | Building high performance transistors on carbon nanotube channel |
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Authors | Pitner, GregorySafron, NathanielChao, Tzu AngLi, ShengmanSu, Sheng KaiZeevi, GiladLin, QingChiu, Hsin YuanPasslack, MatthiasZhang, ZichenSathaiya, D. MahaveerWei, AslanGilardi, CarloChen, EdwardLiew, San LinHou, Vincent D.H.Wu, Chung WeiWu, JeffLin, ZhiweiFagan, JeffreyZheng, MingWang, HanMitra, SubhasishPhilip Wong, H. S.Radu, Iuliana |
Keywords | 1D 2D CMOS CNT low-dimensional material |
Issue Date | 2023 |
Citation | Digest of Technical Papers - Symposium on VLSI Technology, 2023, v. 2023-June How to Cite? |
Abstract | High-performance and scaled transistors on carbon nanotube (CNT) channel are enabled by the quality of device component modules. This paper advances each module by single-CNT control experiments reporting: (1) remarkable n-type contact resistance of 5.1 kΩ/CNT(20.4Ω-μm for 250 CNT/μm) at 20 nm contact length, (2) tunable N-and Pdoping of CNT with dielectric doping, (3) improvement in top-gate dielectric interface to CNT by channel cleaning, (4) demonstration of channel comprised of dense CNT array with reduced bundle density, and (5) analysis of CNT bandgap tradeoffs with variability control strategy. The first component-complete pMOS FET is demonstrated on high-density CNTs with up to 680 μA/μm at -0.7V VDS. |
Persistent Identifier | http://hdl.handle.net/10722/335476 |
ISSN | 2023 SCImago Journal Rankings: 0.911 |
DC Field | Value | Language |
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dc.contributor.author | Pitner, Gregory | - |
dc.contributor.author | Safron, Nathaniel | - |
dc.contributor.author | Chao, Tzu Ang | - |
dc.contributor.author | Li, Shengman | - |
dc.contributor.author | Su, Sheng Kai | - |
dc.contributor.author | Zeevi, Gilad | - |
dc.contributor.author | Lin, Qing | - |
dc.contributor.author | Chiu, Hsin Yuan | - |
dc.contributor.author | Passlack, Matthias | - |
dc.contributor.author | Zhang, Zichen | - |
dc.contributor.author | Sathaiya, D. Mahaveer | - |
dc.contributor.author | Wei, Aslan | - |
dc.contributor.author | Gilardi, Carlo | - |
dc.contributor.author | Chen, Edward | - |
dc.contributor.author | Liew, San Lin | - |
dc.contributor.author | Hou, Vincent D.H. | - |
dc.contributor.author | Wu, Chung Wei | - |
dc.contributor.author | Wu, Jeff | - |
dc.contributor.author | Lin, Zhiwei | - |
dc.contributor.author | Fagan, Jeffrey | - |
dc.contributor.author | Zheng, Ming | - |
dc.contributor.author | Wang, Han | - |
dc.contributor.author | Mitra, Subhasish | - |
dc.contributor.author | Philip Wong, H. S. | - |
dc.contributor.author | Radu, Iuliana | - |
dc.date.accessioned | 2023-11-17T08:26:14Z | - |
dc.date.available | 2023-11-17T08:26:14Z | - |
dc.date.issued | 2023 | - |
dc.identifier.citation | Digest of Technical Papers - Symposium on VLSI Technology, 2023, v. 2023-June | - |
dc.identifier.issn | 0743-1562 | - |
dc.identifier.uri | http://hdl.handle.net/10722/335476 | - |
dc.description.abstract | High-performance and scaled transistors on carbon nanotube (CNT) channel are enabled by the quality of device component modules. This paper advances each module by single-CNT control experiments reporting: (1) remarkable n-type contact resistance of 5.1 kΩ/CNT(20.4Ω-μm for 250 CNT/μm) at 20 nm contact length, (2) tunable N-and Pdoping of CNT with dielectric doping, (3) improvement in top-gate dielectric interface to CNT by channel cleaning, (4) demonstration of channel comprised of dense CNT array with reduced bundle density, and (5) analysis of CNT bandgap tradeoffs with variability control strategy. The first component-complete pMOS FET is demonstrated on high-density CNTs with up to 680 μA/μm at -0.7V VDS. | - |
dc.language | eng | - |
dc.relation.ispartof | Digest of Technical Papers - Symposium on VLSI Technology | - |
dc.subject | 1D | - |
dc.subject | 2D | - |
dc.subject | CMOS | - |
dc.subject | CNT | - |
dc.subject | low-dimensional material | - |
dc.title | Building high performance transistors on carbon nanotube channel | - |
dc.type | Conference_Paper | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.23919/VLSITechnologyandCir57934.2023.10185374 | - |
dc.identifier.scopus | eid_2-s2.0-85167561481 | - |
dc.identifier.volume | 2023-June | - |