Nearly Ideal Subthreshold Swing in Monolayer MoS Top-Gate nFETs with Scaled EOT of 1 nm

Abstract

Transistor scaling enabled by gate length scaling requires EOT scaling to less than 1 nm thickness [1]. This work successfully integrates Hf-based ALD higher-k dielectrics with CVD-grown monolayer (1L) MoS2 to build top-gate nFET with EOT 1 nm with nearly ideal subthreshold swing of 68 mV/dec. The gate stack described here achieves a high varepsilon-{ mathrm{e} mathrm{f} mathrm{f}} 13.53, a large mathrm{E}-{ mathrm{B} mathrm{D}} 12.4MV/cm, and excellent leakage current density. This is a remarkable performance among reported gate dielectrics on the transition metal dichalcogenides (TMDs) on which it is notoriously difficult to deposit a pinhole-free dielectric.