Multi-Scale Thermal Modeling of RRAM-based 3D Monolithic-Integrated Computing-in-Memory Chips

Abstract

Calculation of chip-scale temperature distribution with considering the device behaviors and integration structure is a challenging modeling task. In this paper, we demonstrated the first multi-scale thermal simulation for RRAM-based computing-in-memory chips. To achieve this, we developed a thermal modeling framework, from RRAM device to two level of circuits, 3D integration architecture, and chip package. We assess the temperature distributions under different technology nodes, different cooling methods, and different operation conditions. Furthermore, with the embedded compact model of RRAM, the thermal effects on the computing accuracy of deep neural network computing is evaluated. Some useful design guidelines are provided based on the simulation results.