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Article: Initial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE

TitleInitial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE
Authors
KeywordsHeteroepitaxy
Growth initiation
GaAs on Si
Lattice mismatch
Issue Date2001
Citation
Journal of Electronic Materials, 2001, v. 30, n. 7, p. 812-816 How to Cite?
AbstractInitial growth studies of GaAs on an array of Si islands nanostructured on (100) oriented silicon-on-insulator substrates show that growth occurs through a mixture of selective-area and 3D growth modes. An optimum initiation growth temperature must tune the growth conditions to the geometry of the seed array so that selective-area control is maintained while defect density is minimized. The optimum temperature for a square array of Si islands, 500 nm in pitch, and 100 nm to 280 nm in diameter, is ∼600°C. This temperature yields single-crystal nucleation on each Si island while maintaining selective-area growth mode control. Transmission electron microscope (TEM) analysis of optimized and non-optimized grown GaAs/Si heterostructures show that they accommodate 0.4-0.7% strain. Further reduction in stacking-fault defects attributed to side wall growth may be possible through masking of side wall or annealing.
Persistent Identifierhttp://hdl.handle.net/10722/294943
ISSN
2023 Impact Factor: 2.2
2023 SCImago Journal Rankings: 0.439
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorZubia, D.-
dc.contributor.authorZhang, S.-
dc.contributor.authorBommena, R.-
dc.contributor.authorSun, X.-
dc.contributor.authorBrueck, S. R.J.-
dc.contributor.authorHersee, S. D.-
dc.date.accessioned2021-01-05T04:58:43Z-
dc.date.available2021-01-05T04:58:43Z-
dc.date.issued2001-
dc.identifier.citationJournal of Electronic Materials, 2001, v. 30, n. 7, p. 812-816-
dc.identifier.issn0361-5235-
dc.identifier.urihttp://hdl.handle.net/10722/294943-
dc.description.abstractInitial growth studies of GaAs on an array of Si islands nanostructured on (100) oriented silicon-on-insulator substrates show that growth occurs through a mixture of selective-area and 3D growth modes. An optimum initiation growth temperature must tune the growth conditions to the geometry of the seed array so that selective-area control is maintained while defect density is minimized. The optimum temperature for a square array of Si islands, 500 nm in pitch, and 100 nm to 280 nm in diameter, is ∼600°C. This temperature yields single-crystal nucleation on each Si island while maintaining selective-area growth mode control. Transmission electron microscope (TEM) analysis of optimized and non-optimized grown GaAs/Si heterostructures show that they accommodate 0.4-0.7% strain. Further reduction in stacking-fault defects attributed to side wall growth may be possible through masking of side wall or annealing.-
dc.languageeng-
dc.relation.ispartofJournal of Electronic Materials-
dc.subjectHeteroepitaxy-
dc.subjectGrowth initiation-
dc.subjectGaAs on Si-
dc.subjectLattice mismatch-
dc.titleInitial nanoheteroepitaxial growth of GaAs on Si(100) by OMVPE-
dc.typeArticle-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1007/s11664-001-0062-7-
dc.identifier.scopuseid_2-s2.0-0035392313-
dc.identifier.volume30-
dc.identifier.issue7-
dc.identifier.spage812-
dc.identifier.epage816-
dc.identifier.isiWOS:000169911000005-
dc.identifier.issnl0361-5235-

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