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Conference Paper: Highly resilient minimal path routing algorithm for fault tolerant Network-on-Chips

TitleHighly resilient minimal path routing algorithm for fault tolerant Network-on-Chips
Authors
Man, K. L.Yedluri, KarthikKapoor, Hemangee K.Lei, Chi-UnLim, EnggeeMa, Jieming
KeywordsNetwork-on-Chips
Fault tolerant
Routing
Issue Date2011
Citation
Procedia Engineering, 2011, v. 15, p. 3406-3410 How to Cite?
DOI: http://dx.doi.org/10.1016/j.proeng.2011.08.638
AbstractWe develop a routing algorithm for fault tolerant 2-D mesh Network-on-Chips (NoCs) with permanent faults. The proposed approach is adaptive and distributed, and does not require extra circuitry or routing tables for fault tolerance operation. Deadlock handling and multiple hop links checking are included for a robust system operation. We demonstrate the algorithm mechanism using a mesh example. © 2011 Published by Elsevier Ltd.
Persistent Identifierhttp://hdl.handle.net/10722/198898
ISSN
1877-7058
2020 SCImago Journal Rankings: 0.320
ISI Accession Number ID
WOS:000300876503084

 

DC FieldValueLanguage
dc.contributor.authorMan, K. L.-
dc.contributor.authorYedluri, Karthik-
dc.contributor.authorKapoor, Hemangee K.-
dc.contributor.authorLei, Chi-Un-
dc.contributor.authorLim, Enggee-
dc.contributor.authorMa, Jieming-
dc.date.accessioned2014-07-17T03:52:28Z-
dc.date.available2014-07-17T03:52:28Z-
dc.date.issued2011-
dc.identifier.citationProcedia Engineering, 2011, v. 15, p. 3406-3410-
dc.identifier.issn1877-7058-
dc.identifier.urihttp://hdl.handle.net/10722/198898-
dc.description.abstractWe develop a routing algorithm for fault tolerant 2-D mesh Network-on-Chips (NoCs) with permanent faults. The proposed approach is adaptive and distributed, and does not require extra circuitry or routing tables for fault tolerance operation. Deadlock handling and multiple hop links checking are included for a robust system operation. We demonstrate the algorithm mechanism using a mesh example. © 2011 Published by Elsevier Ltd.-
dc.languageeng-
dc.relation.ispartofProcedia Engineering-
dc.subjectNetwork-on-Chips-
dc.subjectFault tolerant-
dc.subjectRouting-
dc.titleHighly resilient minimal path routing algorithm for fault tolerant Network-on-Chips-
dc.typeConference_Paper-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1016/j.proeng.2011.08.638-
dc.identifier.scopuseid_2-s2.0-84055178560-
dc.identifier.hkuros230682-
dc.identifier.volume15-
dc.identifier.spage3406-
dc.identifier.epage3410-
dc.identifier.isiWOS:000300876503084-
dc.identifier.issnl1877-7058-

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