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- Publisher Website: 10.1109/ASPDAC.2013.6509648
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Conference Paper: Piecewise-polynomial associated transform macromodeling algorithm for fast nonlinear circuit simulation
Title | Piecewise-polynomial associated transform macromodeling algorithm for fast nonlinear circuit simulation |
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Authors | |
Keywords | Circuit design Compact dimensions Higher order harmonics Nonlinear circuit Nonlinear circuit simulation Numerical example Piecewise-linear Transform algorithm |
Issue Date | 2013 |
Publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000194 |
Citation | The 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013), Yokohama, Japan, 22-25 January 2013. In Conference Proceedings, 2013, p. 515-520 How to Cite? |
Abstract | We present a piecewise-polynomial based associated transform algorithm (PWPAT) for macromodeling nonlinear circuits in system-level circuit design. The generated reduced model can provide both global and local accuracies with the most compact dimension. Numerical examples compare it with existing algorithms and verify its superior accuracy in higher order harmonics simulation over traditional Trajectory Piecewise-Linear (TPWL) approach. © 2013 IEEE. |
Persistent Identifier | http://hdl.handle.net/10722/189852 |
ISBN |
DC Field | Value | Language |
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dc.contributor.author | Zhang, Y | en_US |
dc.contributor.author | Fong, N | en_US |
dc.contributor.author | Wong, N | en_US |
dc.date.accessioned | 2013-09-17T15:00:53Z | - |
dc.date.available | 2013-09-17T15:00:53Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.citation | The 18th Asia and South Pacific Design Automation Conference (ASP-DAC 2013), Yokohama, Japan, 22-25 January 2013. In Conference Proceedings, 2013, p. 515-520 | en_US |
dc.identifier.isbn | 978-1-4673-3030-5 | - |
dc.identifier.uri | http://hdl.handle.net/10722/189852 | - |
dc.description.abstract | We present a piecewise-polynomial based associated transform algorithm (PWPAT) for macromodeling nonlinear circuits in system-level circuit design. The generated reduced model can provide both global and local accuracies with the most compact dimension. Numerical examples compare it with existing algorithms and verify its superior accuracy in higher order harmonics simulation over traditional Trajectory Piecewise-Linear (TPWL) approach. © 2013 IEEE. | - |
dc.language | eng | en_US |
dc.publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000194 | - |
dc.relation.ispartof | Asia and South Pacific Design Automation Conference Proceedings | en_US |
dc.subject | Circuit design | - |
dc.subject | Compact dimensions | - |
dc.subject | Higher order harmonics | - |
dc.subject | Nonlinear circuit | - |
dc.subject | Nonlinear circuit simulation | - |
dc.subject | Numerical example | - |
dc.subject | Piecewise-linear | - |
dc.subject | Transform algorithm | - |
dc.title | Piecewise-polynomial associated transform macromodeling algorithm for fast nonlinear circuit simulation | en_US |
dc.type | Conference_Paper | en_US |
dc.identifier.email | Zhang, Y: yangzh@hku.hk | en_US |
dc.identifier.email | Fong, N: nfong@eee.hku.hk | en_US |
dc.identifier.email | Wong, N: nwong@eee.hku.hk | - |
dc.identifier.authority | Wong, N=rp00190 | en_US |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/ASPDAC.2013.6509648 | - |
dc.identifier.scopus | eid_2-s2.0-84877772221 | - |
dc.identifier.hkuros | 222406 | en_US |
dc.identifier.spage | 515 | en_US |
dc.identifier.epage | 520 | en_US |
dc.publisher.place | United States | - |
dc.customcontrol.immutable | sml 131030 | - |