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Conference Paper: Impacts of Ti content and annealing temperature on electrical properties of Si MOS capacitors with HfTiON gate dielectric

TitleImpacts of Ti content and annealing temperature on electrical properties of Si MOS capacitors with HfTiON gate dielectric
Authors
KeywordsHfTiON
High-k dielectric
MOS capacitor
Issue Date2009
PublisherIEEE.
Citation
2009 Ieee International Conference On Electron Devices And Solid-State Circuits, Edssc 2009, 2009, p. 221-224 How to Cite?
AbstractHfTiON gate dielectric is fabricated by reactive co-sputtering method followed by annealing in N 2 ambient. The effects of Ti content and annealing temperature on the performances of HfTiON gate-dielectric Si MOS devices are investigated. Experimental results indicate that gate capacitance is increased with increasing Ti content. However, when the Ti/Hf ratio exceeds -1.75, increase of the gate capacitance becomes small. Surface roughness of the samples annealed at different temperatures is analyzed by AFM, and results show that high annealing temperature (e.g. 700 °C for 30 s) can produce smooth surface, thus resulting in low gate leakage current. ©2009 IEEE.
DescriptionProceedings of the IEEE International Conference of Electron Devices and Solid-State Circuits, 2009, p. 221-224
Persistent Identifierhttp://hdl.handle.net/10722/126194
ISBN
ISI Accession Number ID
References

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_HK
dc.contributor.authorXu, JPen_HK
dc.contributor.authorLi, CXen_HK
dc.contributor.authorLai, PTen_HK
dc.contributor.authorChan, CLen_HK
dc.date.accessioned2010-10-31T12:14:54Z-
dc.date.available2010-10-31T12:14:54Z-
dc.date.issued2009en_HK
dc.identifier.citation2009 Ieee International Conference On Electron Devices And Solid-State Circuits, Edssc 2009, 2009, p. 221-224en_HK
dc.identifier.isbn978-1-4244-4297-3-
dc.identifier.urihttp://hdl.handle.net/10722/126194-
dc.descriptionProceedings of the IEEE International Conference of Electron Devices and Solid-State Circuits, 2009, p. 221-224-
dc.description.abstractHfTiON gate dielectric is fabricated by reactive co-sputtering method followed by annealing in N 2 ambient. The effects of Ti content and annealing temperature on the performances of HfTiON gate-dielectric Si MOS devices are investigated. Experimental results indicate that gate capacitance is increased with increasing Ti content. However, when the Ti/Hf ratio exceeds -1.75, increase of the gate capacitance becomes small. Surface roughness of the samples annealed at different temperatures is analyzed by AFM, and results show that high annealing temperature (e.g. 700 °C for 30 s) can produce smooth surface, thus resulting in low gate leakage current. ©2009 IEEE.en_HK
dc.languageengen_HK
dc.publisherIEEE.-
dc.relation.ispartof2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009en_HK
dc.rights©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.subjectHfTiONen_HK
dc.subjectHigh-k dielectricen_HK
dc.subjectMOS capacitoren_HK
dc.titleImpacts of Ti content and annealing temperature on electrical properties of Si MOS capacitors with HfTiON gate dielectricen_HK
dc.typeConference_Paperen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=978-1-4244-4297-3&volume=&spage=221&epage=224&date=2009&atitle=Impacts+of+Ti+content+and+annealing+temperature+on+electrical+properties+of+Si+MOS+capacitors+with+HfTiON+gate+dielectric-
dc.identifier.emailXu, JP: jpxu@eee.hku.hken_HK
dc.identifier.emailLai, PT: laip@eee.hku.hken_HK
dc.identifier.authorityXu, JP=rp00197en_HK
dc.identifier.authorityLai, PT=rp00130en_HK
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/EDSSC.2009.5394278en_HK
dc.identifier.scopuseid_2-s2.0-77949625616en_HK
dc.identifier.hkuros180055en_HK
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-77949625616&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.spage221en_HK
dc.identifier.epage224en_HK
dc.identifier.isiWOS:000289818000056-
dc.identifier.scopusauthoridJi, F=8238553900en_HK
dc.identifier.scopusauthoridXu, JP=7407004696en_HK
dc.identifier.scopusauthoridLi, CX=22034888200en_HK
dc.identifier.scopusauthoridLai, PT=7202946460en_HK
dc.identifier.scopusauthoridChan, CL=8507083700en_HK

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