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Article: Analysis and design of multiple-bit high-order Σ-Δ modulator

TitleAnalysis and design of multiple-bit high-order Σ-Δ modulator
Authors
Hong, Hao-ChiaoLin, Bin-HongWu, Cheng-Wen
KeywordsAnalog To Digital Conversion
Bandwidth
Capacitors
Computer Aided Analysis
Computer Aided Design
Computer Simulation
Frequency Response
Operational Amplifiers
Signal To Noise Ratio
Issue Date1997
Citation
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 1997, p. 419-424 How to Cite?
AbstractThe high-order Σ-Δ modulator is an appropriate approach for high-bandwidth, high-resolution A/D conversion. However, non-ideal effects such as the finite op-amp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable non-ideal effects, we explore several multiple-bit schemes, based on our CIQE high-order Σ-Δ architecture, to remove the non-ideal deterioration. Design rules of these multiple-bit schemes are developed and verified by extensive simulations.
Persistent Identifierhttp://hdl.handle.net/10722/90871

 

DC FieldValueLanguage
dc.contributor.authorHong, Hao-Chiaoen_HK
dc.contributor.authorLin, Bin-Hongen_HK
dc.contributor.authorWu, Cheng-Wenen_HK
dc.date.accessioned2010-09-17T10:09:38Z-
dc.date.available2010-09-17T10:09:38Z-
dc.date.issued1997en_HK
dc.identifier.citationProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 1997, p. 419-424en_HK
dc.identifier.urihttp://hdl.handle.net/10722/90871-
dc.description.abstractThe high-order Σ-Δ modulator is an appropriate approach for high-bandwidth, high-resolution A/D conversion. However, non-ideal effects such as the finite op-amp gain and the capacitor mismatch have great impacts on its performance at a low oversampling ratio. To achieve greater performance under the inevitable non-ideal effects, we explore several multiple-bit schemes, based on our CIQE high-order Σ-Δ architecture, to remove the non-ideal deterioration. Design rules of these multiple-bit schemes are developed and verified by extensive simulations.en_HK
dc.languageengen_HK
dc.relation.ispartofProceedings of the Asia and South Pacific Design Automation Conference, ASP-DACen_HK
dc.subjectAnalog To Digital Conversionen_HK
dc.subjectBandwidthen_HK
dc.subjectCapacitorsen_HK
dc.subjectComputer Aided Analysisen_HK
dc.subjectComputer Aided Designen_HK
dc.subjectComputer Simulationen_HK
dc.subjectFrequency Responseen_HK
dc.subjectOperational Amplifiersen_HK
dc.subjectSignal To Noise Ratioen_HK
dc.titleAnalysis and design of multiple-bit high-order Σ-Δ modulatoren_HK
dc.typeArticleen_HK
dc.identifier.emailLin, B:blin@hku.hken_HK
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.scopuseid_2-s2.0-0030702998en_HK
dc.identifier.spage419en_HK
dc.identifier.epage424en_HK

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