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Article: Fast signature computation algorithm for LFSR and MISR

TitleFast signature computation algorithm for LFSR and MISR
Authors
Lin, Bin-HongShieh, Shao-HuiWu, Cheng-Wen
KeywordsAlgorithms
Built-In Self Test
Computer Simulation
Electric Fault Currents
Table Lookup
Issue Date2000
PublisherIEEE
Citation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000, v. 19 n. 9, p. 1031-1040 How to Cite?
AbstractA multiple-input signature register (MISR) computation algorithm for fast signature simulation is proposed. Based on the table look-up linear compaction algorithm and the modularity property of a single-input signature register (SISR), some new accelerating schemes - partial-input look-up tables and flying-state look-up tables - are developed to boost the signature computation speed. Mathematical analysis and simulation results show that this algorithm has an order of magnitude speedup without extra memory requirement compared with the original linear compaction algorithm. Though this algorithm is derived for SISR, a simple conversion scheme exists that can convert internal-EXOR MISR to SISR. Consequently, fast MISR signature computation can be done.
Persistent Identifierhttp://hdl.handle.net/10722/90777
ISSN
0278-0070
2023 Impact Factor: 2.7
2023 SCImago Journal Rankings: 0.957
ISI Accession Number ID
WOS:000088959300007

 

DC FieldValueLanguage
dc.contributor.authorLin, Bin-Hongen_HK
dc.contributor.authorShieh, Shao-Huien_HK
dc.contributor.authorWu, Cheng-Wenen_HK
dc.date.accessioned2010-09-17T10:08:13Z-
dc.date.available2010-09-17T10:08:13Z-
dc.date.issued2000en_HK
dc.identifier.citationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2000, v. 19 n. 9, p. 1031-1040en_HK
dc.identifier.issn0278-0070en_HK
dc.identifier.urihttp://hdl.handle.net/10722/90777-
dc.description.abstractA multiple-input signature register (MISR) computation algorithm for fast signature simulation is proposed. Based on the table look-up linear compaction algorithm and the modularity property of a single-input signature register (SISR), some new accelerating schemes - partial-input look-up tables and flying-state look-up tables - are developed to boost the signature computation speed. Mathematical analysis and simulation results show that this algorithm has an order of magnitude speedup without extra memory requirement compared with the original linear compaction algorithm. Though this algorithm is derived for SISR, a simple conversion scheme exists that can convert internal-EXOR MISR to SISR. Consequently, fast MISR signature computation can be done.en_HK
dc.languageengen_HK
dc.publisherIEEEen_HK
dc.relation.ispartofIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systemsen_HK
dc.subjectAlgorithmsen_HK
dc.subjectBuilt-In Self Testen_HK
dc.subjectComputer Simulationen_HK
dc.subjectElectric Fault Currentsen_HK
dc.subjectTable Lookupen_HK
dc.titleFast signature computation algorithm for LFSR and MISRen_HK
dc.typeArticleen_HK
dc.identifier.emailLin, B:blin@hku.hken_HK
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.scopuseid_2-s2.0-0034259581en_HK
dc.identifier.volume19en_HK
dc.identifier.issue9en_HK
dc.identifier.spage1031en_HK
dc.identifier.epage1040en_HK
dc.identifier.isiWOS:000088959300007-
dc.identifier.issnl0278-0070-

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