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Article: Bit-stream adders and multipliers for tri-level sigma-delta modulators

TitleBit-stream adders and multipliers for tri-level sigma-delta modulators
Authors
Ng, CWWong, NNg, TS
KeywordsAdder circuit
Multiplier circuit
Oversampling
Tri-level sigma-delta modulation
Issue Date2007
PublisherIEEE.
Citation
IEEE Transactions On Circuits And Systems Ii: Express Briefs, 2007, v. 54 n. 12, p. 1082-1086 How to Cite?
DOI: http://dx.doi.org/10.1109/TCSII.2007.906173
AbstractWe propose both adder and multiplier circuits for bit-stream signal processing customized for tri-level sigma-delta modulated signals. These architectures are the 2-bit extensions from the existing 1-bit bit-stream adders and multipliers, and are shown to offer better signal-to-noise performance. Field-programmable gate array implementations then confirm their efficacy. © 2007 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/57475
ISSN
1549-7747
2021 Impact Factor: 3.691
2020 SCImago Journal Rankings: 0.799
ISI Accession Number ID
WOS:000251944900012
References
References in Scopus

 

DC FieldValueLanguage
dc.contributor.authorNg, CWen_HK
dc.contributor.authorWong, Nen_HK
dc.contributor.authorNg, TSen_HK
dc.date.accessioned2010-04-12T01:37:35Z-
dc.date.available2010-04-12T01:37:35Z-
dc.date.issued2007en_HK
dc.identifier.citationIEEE Transactions On Circuits And Systems Ii: Express Briefs, 2007, v. 54 n. 12, p. 1082-1086en_HK
dc.identifier.issn1549-7747en_HK
dc.identifier.urihttp://hdl.handle.net/10722/57475-
dc.description.abstractWe propose both adder and multiplier circuits for bit-stream signal processing customized for tri-level sigma-delta modulated signals. These architectures are the 2-bit extensions from the existing 1-bit bit-stream adders and multipliers, and are shown to offer better signal-to-noise performance. Field-programmable gate array implementations then confirm their efficacy. © 2007 IEEE.en_HK
dc.languageengen_HK
dc.publisherIEEE.en_HK
dc.relation.ispartofIEEE Transactions on Circuits and Systems II: Express Briefsen_HK
dc.rights©2007 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.subjectAdder circuiten_HK
dc.subjectMultiplier circuiten_HK
dc.subjectOversamplingen_HK
dc.subjectTri-level sigma-delta modulationen_HK
dc.titleBit-stream adders and multipliers for tri-level sigma-delta modulatorsen_HK
dc.typeArticleen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=1057-7130&volume=54&issue=12&spage=1082&epage=1086&date=2007&atitle=Bit-stream+adders+and+multipliers+for+tri-level+sigma-delta+modulatorsen_HK
dc.identifier.emailWong, N:nwong@eee.hku.hken_HK
dc.identifier.emailNg, TS:tsng@eee.hku.hken_HK
dc.identifier.authorityWong, N=rp00190en_HK
dc.identifier.authorityNg, TS=rp00159en_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.doi10.1109/TCSII.2007.906173en_HK
dc.identifier.scopuseid_2-s2.0-44649136353en_HK
dc.identifier.hkuros144843-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-44649136353&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.volume54en_HK
dc.identifier.issue12en_HK
dc.identifier.spage1082en_HK
dc.identifier.epage1086en_HK
dc.identifier.isiWOS:000251944900012-
dc.publisher.placeUnited Statesen_HK
dc.identifier.scopusauthoridNg, CW=36747471300en_HK
dc.identifier.scopusauthoridWong, N=35235551600en_HK
dc.identifier.scopusauthoridNg, TS=7402229975en_HK
dc.identifier.issnl1549-7747-

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