Breakthrough Short Circuit Robustness Demonstrated in Vertical GaN Fin JFET

Abstract

Insufficient short-circuit (SC) robustness of currently commercial GaN power devices, i.e., the high electron mobility transistors (HEMTs), is a key roadblock for their applications in automotive powertrains. At a 400 V bus voltage (VBUS), the SC withstanding time (tSC) of commercial GaN HEMTs is typically below 1 μs, far below the usual system requirement (>10 μs). This letter presents breakthrough short-circuit capability in a vertical GaN fin-channel junction-gate field-effect transistor (Fin-JFET). The Fin-JFET is normally off with a 0.7 mΩ·cm2 specific on-resistance and 800 V avalanche breakdown voltage (BVAVA) at the room temperature. The gate driver in the short-circuit test was designed to be identical to that in device switching applications. The tSC of GaN Fin-JFETs was measured to be 30.5 μs at a VBUS of 400 V, 17.0 μs at 600 V, and 11.6 μs at 800 V, all among the longest reported for 600-700 V normally off transistors. In addition, GaN Fin-JFETs failed open in these tests and retained BVAVA after failure, which is highly desirable for system applications. In the repetitive 10 μs, 400 V short-circuit tests, GaN Fin-JFETs showed no degradation after 30 000 cycles. Furthermore, to the best of our knowledge, this is the first report of a power transistor with good short-circuit ruggedness at a bus voltage close to its BVAVA. The underlying mechanism is the unique avalanche-through-fin in the Fin-JFET, which is validated by mixed-mode TCAD simulations and unclamped inductive switching tests. These results reveal the inherent ruggedness of GaN Fin-JFETs in the concurrent presence of short-circuit and overvoltage in power electronics systems.