High-performance GaN vertical fin power transistors on bulk GaN substrates

Abstract

This letter reports a GaN vertical fin power field-effect-transistor structure with submicron fin-shaped channels on bulk GaN substrates. In this vertical transistor design only n-GaN layers are needed, while no material regrowth or p-GaN layer is required. A combined dry/wet etch was used to get smooth fin vertical sidewalls. The fabricated transistor demonstrated a threshold voltage of 1 V and specific on resistance of 0.36 mΩcm2. By proper electric field engineering, 800 V blocking voltage was achieved at a gate bias of 0 V.