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Article: Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics

TitleDesign, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS<inf>2</inf> Circuits with E-Mode FETs for Large-Area Electronics
Authors
Keywordschemical vapor deposition
computer-aided design flow
digital circuits
molybdenum disulfide
power management circuits
Transition metal dichalcogenides
Issue Date2016
Citation
Nano Letters, 2016, v. 16, n. 10, p. 6349-6356 How to Cite?
AbstractTwo-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.
Persistent Identifierhttp://hdl.handle.net/10722/352146
ISSN
2023 Impact Factor: 9.6
2023 SCImago Journal Rankings: 3.411
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorYu, Lili-
dc.contributor.authorEl-Damak, Dina-
dc.contributor.authorRadhakrishna, Ujwal-
dc.contributor.authorLing, Xi-
dc.contributor.authorZubair, Ahmad-
dc.contributor.authorLin, Yuxuan-
dc.contributor.authorZhang, Yuhao-
dc.contributor.authorChuang, Meng Hsi-
dc.contributor.authorLee, Yi Hsien-
dc.contributor.authorAntoniadis, Dimitri-
dc.contributor.authorKong, Jing-
dc.contributor.authorChandrakasan, Anantha-
dc.contributor.authorPalacios, Tomas-
dc.date.accessioned2024-12-16T03:56:58Z-
dc.date.available2024-12-16T03:56:58Z-
dc.date.issued2016-
dc.identifier.citationNano Letters, 2016, v. 16, n. 10, p. 6349-6356-
dc.identifier.issn1530-6984-
dc.identifier.urihttp://hdl.handle.net/10722/352146-
dc.description.abstractTwo-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.-
dc.languageeng-
dc.relation.ispartofNano Letters-
dc.subjectchemical vapor deposition-
dc.subjectcomputer-aided design flow-
dc.subjectdigital circuits-
dc.subjectmolybdenum disulfide-
dc.subjectpower management circuits-
dc.subjectTransition metal dichalcogenides-
dc.titleDesign, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS<inf>2</inf> Circuits with E-Mode FETs for Large-Area Electronics-
dc.typeArticle-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1021/acs.nanolett.6b02739-
dc.identifier.scopuseid_2-s2.0-84991393475-
dc.identifier.volume16-
dc.identifier.issue10-
dc.identifier.spage6349-
dc.identifier.epage6356-
dc.identifier.eissn1530-6992-
dc.identifier.isiWOS:000385469800052-

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