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Article: Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics
| Title | Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS<inf>2</inf> Circuits with E-Mode FETs for Large-Area Electronics |
|---|---|
| Authors | |
| Keywords | chemical vapor deposition computer-aided design flow digital circuits molybdenum disulfide power management circuits Transition metal dichalcogenides |
| Issue Date | 2016 |
| Citation | Nano Letters, 2016, v. 16, n. 10, p. 6349-6356 How to Cite? |
| Abstract | Two-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials. |
| Persistent Identifier | http://hdl.handle.net/10722/352146 |
| ISSN | 2023 Impact Factor: 9.6 2023 SCImago Journal Rankings: 3.411 |
| ISI Accession Number ID |
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yu, Lili | - |
| dc.contributor.author | El-Damak, Dina | - |
| dc.contributor.author | Radhakrishna, Ujwal | - |
| dc.contributor.author | Ling, Xi | - |
| dc.contributor.author | Zubair, Ahmad | - |
| dc.contributor.author | Lin, Yuxuan | - |
| dc.contributor.author | Zhang, Yuhao | - |
| dc.contributor.author | Chuang, Meng Hsi | - |
| dc.contributor.author | Lee, Yi Hsien | - |
| dc.contributor.author | Antoniadis, Dimitri | - |
| dc.contributor.author | Kong, Jing | - |
| dc.contributor.author | Chandrakasan, Anantha | - |
| dc.contributor.author | Palacios, Tomas | - |
| dc.date.accessioned | 2024-12-16T03:56:58Z | - |
| dc.date.available | 2024-12-16T03:56:58Z | - |
| dc.date.issued | 2016 | - |
| dc.identifier.citation | Nano Letters, 2016, v. 16, n. 10, p. 6349-6356 | - |
| dc.identifier.issn | 1530-6984 | - |
| dc.identifier.uri | http://hdl.handle.net/10722/352146 | - |
| dc.description.abstract | Two-dimensional electronics based on single-layer (SL) MoS2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials. | - |
| dc.language | eng | - |
| dc.relation.ispartof | Nano Letters | - |
| dc.subject | chemical vapor deposition | - |
| dc.subject | computer-aided design flow | - |
| dc.subject | digital circuits | - |
| dc.subject | molybdenum disulfide | - |
| dc.subject | power management circuits | - |
| dc.subject | Transition metal dichalcogenides | - |
| dc.title | Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS<inf>2</inf> Circuits with E-Mode FETs for Large-Area Electronics | - |
| dc.type | Article | - |
| dc.description.nature | link_to_subscribed_fulltext | - |
| dc.identifier.doi | 10.1021/acs.nanolett.6b02739 | - |
| dc.identifier.scopus | eid_2-s2.0-84991393475 | - |
| dc.identifier.volume | 16 | - |
| dc.identifier.issue | 10 | - |
| dc.identifier.spage | 6349 | - |
| dc.identifier.epage | 6356 | - |
| dc.identifier.eissn | 1530-6992 | - |
| dc.identifier.isi | WOS:000385469800052 | - |
