Impact of Gate-Dielectric Annealing Temperature on Screening of Remote Phonon Scattering in InGaZnO Thin-Film Transistors

Abstract

<p> InGaZnO (IGZO) thin-film transistors (TFTs) with NdHfO gate dielectric have been fabricated with different gate-dielectric annealing temperatures (room temperature, 50 degrees C, 100 degrees C, 150 degrees C, 200 degrees C, 400 degrees C, and 800 degrees C) in order to investigate the influence of remote phonon scattering (RPS) generated by the atomic vibration of the gate dielectric on the carrier mobility in the neighboring IGZO channel. Surprisingly, despite having the best gate-dielectric quality, the sample with the highest annealing temperature of 800 degrees C has the lowest carrier mobility. The reason should lie in its thickest interlayer grown between the gate dielectric and the gate electrode, which results in the largest separation between the gate-electrode holes and the gate-dielectric dipoles and, thus, the weakest screening effect of the former on the RPS on the charge carriers in the IGZO channel. <br></p>