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postgraduate thesis: The path to adjust the size and performance of OFETs by using the shrinking process

TitleThe path to adjust the size and performance of OFETs by using the shrinking process
Authors
Advisors
Advisor(s):Chan, KL
Issue Date2021
PublisherThe University of Hong Kong (Pokfulam, Hong Kong)
Citation
Dai, S. H. S. D. [戴瑞康]. (2021). The path to adjust the size and performance of OFETs by using the shrinking process. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR.
AbstractOrganic field-effect transistors (OFETs), as essential building blocks for next-generation devices, are being widely incorporated in flexible and transparent electronics. To enhance the performance of OFETs, the transistor number density must be increased, and the operating voltage must be decreased. Downsizing fabrication methods must be used to achieve a high transistor density. However, traditional downsizing fabrication techniques such as photolithography, extreme ultraviolet lithography, or e-beam lithography involve extensive fabrication processes and require expensive equipment. This study provides a novel strategy for downsizing, in which a shrink film (pre-stressed polystyrene (PS), in which the entanglement of the polymer chain is used to store and release the internal stress during cooling or heating) is used as the substrate of a thin-film OFET device, and the device is shrunk through heating. When the heating temperature exceeds the glass transition temperature, the shrink film substrate releases the internal stress and decreases the projective area of the device by over 78% (the projective channel width and length decrease by approximately 53.5%). This method can effectively increase the transistor number density by four times through simple heating equipment and a facile process. The shrinking method can also enhance the OFET performance. The shrunk OFET device exhibits a wrinkle morphology, in which the dielectric layer has a nonuniform electric field distribution. Therefore, the electric field in the concave wrinkle region and areal capacitance of the dielectric layer area increase. The electric field is intensified when the wrinkle size decreases and number increases, thereby enhancing the device performance. Therefore, the subthreshold voltage of the transistor decreases from -1.44 V (before shrinking) to -0.18 V (after shrinking) with a subthreshold swing of 74 mV/dec and intrinsic gain of 4.151 × 10^4. The shrunk OFET device outperforms the existing OFET devices. This result demonstrates that the shrinking method is a low cost and time-saving downsizing method, and the wrinkle structure can enhance the device performance. Shrunk OFET devices can function as low-voltage operating devices for high sensitivity applications such as low power digital circuits and bio-wearable devices.
DegreeMaster of Philosophy
SubjectOrganic field-effect transistors
Dept/ProgramMechanical Engineering
Persistent Identifierhttp://hdl.handle.net/10722/328178

 

DC FieldValueLanguage
dc.contributor.advisorChan, KL-
dc.contributor.authorDai, Shui Hong Siddhartha Derck-
dc.contributor.author戴瑞康-
dc.date.accessioned2023-06-05T09:05:45Z-
dc.date.available2023-06-05T09:05:45Z-
dc.date.issued2021-
dc.identifier.citationDai, S. H. S. D. [戴瑞康]. (2021). The path to adjust the size and performance of OFETs by using the shrinking process. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR.-
dc.identifier.urihttp://hdl.handle.net/10722/328178-
dc.description.abstractOrganic field-effect transistors (OFETs), as essential building blocks for next-generation devices, are being widely incorporated in flexible and transparent electronics. To enhance the performance of OFETs, the transistor number density must be increased, and the operating voltage must be decreased. Downsizing fabrication methods must be used to achieve a high transistor density. However, traditional downsizing fabrication techniques such as photolithography, extreme ultraviolet lithography, or e-beam lithography involve extensive fabrication processes and require expensive equipment. This study provides a novel strategy for downsizing, in which a shrink film (pre-stressed polystyrene (PS), in which the entanglement of the polymer chain is used to store and release the internal stress during cooling or heating) is used as the substrate of a thin-film OFET device, and the device is shrunk through heating. When the heating temperature exceeds the glass transition temperature, the shrink film substrate releases the internal stress and decreases the projective area of the device by over 78% (the projective channel width and length decrease by approximately 53.5%). This method can effectively increase the transistor number density by four times through simple heating equipment and a facile process. The shrinking method can also enhance the OFET performance. The shrunk OFET device exhibits a wrinkle morphology, in which the dielectric layer has a nonuniform electric field distribution. Therefore, the electric field in the concave wrinkle region and areal capacitance of the dielectric layer area increase. The electric field is intensified when the wrinkle size decreases and number increases, thereby enhancing the device performance. Therefore, the subthreshold voltage of the transistor decreases from -1.44 V (before shrinking) to -0.18 V (after shrinking) with a subthreshold swing of 74 mV/dec and intrinsic gain of 4.151 × 10^4. The shrunk OFET device outperforms the existing OFET devices. This result demonstrates that the shrinking method is a low cost and time-saving downsizing method, and the wrinkle structure can enhance the device performance. Shrunk OFET devices can function as low-voltage operating devices for high sensitivity applications such as low power digital circuits and bio-wearable devices. -
dc.languageeng-
dc.publisherThe University of Hong Kong (Pokfulam, Hong Kong)-
dc.relation.ispartofHKU Theses Online (HKUTO)-
dc.rightsThe author retains all proprietary rights, (such as patent rights) and the right to use in future works.-
dc.rightsThis work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.-
dc.subject.lcshOrganic field-effect transistors-
dc.titleThe path to adjust the size and performance of OFETs by using the shrinking process-
dc.typePG_Thesis-
dc.description.thesisnameMaster of Philosophy-
dc.description.thesislevelMaster-
dc.description.thesisdisciplineMechanical Engineering-
dc.description.naturepublished_or_final_version-
dc.date.hkucongregation2022-
dc.identifier.mmsid991044550303103414-

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