Electrodeposition of nanostructured copper and its potential application in 3D IC packaging

Abstract

The computing performances of integrated circuit have been improved dramatically due to the surge of transistor density as predicted by Moore’s law. However, the resultant shrinkage of transistors will eventually reach the physical limit, compelling Moore’s law invalid in the near future. A technological transition to more than Moore is occurring by utilizing 3D integration. Among the vertical packaging technologies, microbump, through silicon via, and direct Cu-to-Cu bonding have emerged as the most promising candidates. Cu electrodeposit widely applied in these techniques is also facing challenges in terms of interfacial performance, mechanical properties, filling capability, and thermal stability. New microstructure design and performance enhancement of electroplated nanocrystalline Cu open up an alternative route to fulfill the industrial requirements in 3D packaging.

To study the Cu grain size effect on the interfacial microstructure evolution of SnAg/Cu microbumps, Cu films with more than one order of grain size difference are prepared by electrodeposition. Large hardness disparity is observed for microcrysatlline (0.85 GPa) and nanocrystalline Cu (1.94 GPa), which obeys the Hall-Petch relationship. SnAg/Cu microbumps are formed by soldering and electroplating SnAg solder on the Cu layer. Severe voids formation and interface alternation are observed for the nanocrystalline Cu, in contrast to the void-free microcrysatlline Cu after thermal aging. High level impurities found in the Cu films are ascribed to the voiding suggesting the important role of grain boundary in both storing vacancies and impurities. Two simple improvement strategies by modifying the additive amount and behavior successfully suppress the impurity level of nanocrystalline Cu without changing its virgin bath and sacrificing too much hardness.

To further strengthen the nanocrystalline Cu, (111)-preferred and twin-doped nanocrystalline Cu is direct-current prepared. Ultrahigh ultimate strength of 977 MPa and 1158 MPa are achieved in tension and compression tests respectively. The nanoscale Cu grains with an average grain size around 61 nm greatly contributes to the ultrahigh 742 MPa yield strength. A gap between the obtained tensile yield strength and Hall-Petch relation indicates the presence of extra strengthening mechanism. The highly (111) oriented texture and sporadic twins with optimum thicknesses effectively impede intragranular dislocation movements, thus further advance the strength. The via filling capability and high throughput are also demonstrated in the patterned wafer plating. The combination of ultrahigh strength, (111) preferred texture, and filling capability satisfies the requirements of Cu plating technology in advanced packaging.

To solve the inherent instability of nanocrystalline Cu, a heterogenous trimodal structure is prepared via one-step direct-current electroplating. High densities of nanotwins are introduced in the fine/nano grain matrix resulting in a high hardness retained trimodal microstructure. The onset grain coarsening temperature is enhanced to 673 K, superior to the pure nanocrystalline Cu which easily undergoes a self-recrystallization process under room temperature. The excellent thermal stability is attributed to the low energy interfaces which reduce the total energy via rearranging the twin-grain interface atoms. The one-step electrodeposition method of trimodal structure is not only feasible for the industrial packaging application, but also provides a simple solution for the fabrication of heterogeneous structures.