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Article: Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part II: Applications and Benchmark
Title | Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part II: Applications and Benchmark |
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Authors | |
Keywords | In-memory computing (IMC) memory reliability memristor neural networks PageRank |
Issue Date | 2021 |
Publisher | Institute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 |
Citation | IEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4379-4383 How to Cite? |
Abstract | In-memory computing (IMC) is attracting interest for accelerating data-intensive computing tasks, such as artificial intelligence (AI), machine learning (ML), and scientific calculus. IMC is typically conducted in the analog domain in crosspoint arrays of resistive random access memory (RRAM) devices or memristors. However, the precision of analog operations can be hindered by various sources of noise, such as the nonlinearity of the circuit components and the programming variations due to stuck devices and stochastic switching. Here we demonstrate high-precision IMC by a custom program-verify algorithm that uses redundancy to limit the impact of stuck devices and analog slicing to encode the analog programming error in a separate memory cell. The PageRank problem, consisting of the calculation of the principal eigenvector, is shown as a reference problem, adopting a fully integrated RRAM circuit. We extend these results to also include a convolutional neural network (CNN). We demonstrate a computing accuracy of 6.7 equivalent number of bits (ENOBs). Finally, we compare our results to the solution of the same problem by a static random access memory (SRAM)-based IMC, showcasing an advantage for the RRAM implementation in terms of energy efficiency and scaling. |
Persistent Identifier | http://hdl.handle.net/10722/305793 |
ISSN | 2023 Impact Factor: 2.9 2023 SCImago Journal Rankings: 0.785 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Pedretti, G | - |
dc.contributor.author | Mannocci, P | - |
dc.contributor.author | Li, C | - |
dc.contributor.author | Sun, Z | - |
dc.contributor.author | Strachan, JP | - |
dc.contributor.author | Ielmini, D | - |
dc.date.accessioned | 2021-10-20T10:14:24Z | - |
dc.date.available | 2021-10-20T10:14:24Z | - |
dc.date.issued | 2021 | - |
dc.identifier.citation | IEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4379-4383 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | http://hdl.handle.net/10722/305793 | - |
dc.description.abstract | In-memory computing (IMC) is attracting interest for accelerating data-intensive computing tasks, such as artificial intelligence (AI), machine learning (ML), and scientific calculus. IMC is typically conducted in the analog domain in crosspoint arrays of resistive random access memory (RRAM) devices or memristors. However, the precision of analog operations can be hindered by various sources of noise, such as the nonlinearity of the circuit components and the programming variations due to stuck devices and stochastic switching. Here we demonstrate high-precision IMC by a custom program-verify algorithm that uses redundancy to limit the impact of stuck devices and analog slicing to encode the analog programming error in a separate memory cell. The PageRank problem, consisting of the calculation of the principal eigenvector, is shown as a reference problem, adopting a fully integrated RRAM circuit. We extend these results to also include a convolutional neural network (CNN). We demonstrate a computing accuracy of 6.7 equivalent number of bits (ENOBs). Finally, we compare our results to the solution of the same problem by a static random access memory (SRAM)-based IMC, showcasing an advantage for the RRAM implementation in terms of energy efficiency and scaling. | - |
dc.language | eng | - |
dc.publisher | Institute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 | - |
dc.relation.ispartof | IEEE Transactions on Electron Devices | - |
dc.rights | IEEE Transactions on Electron Devices. Copyright © Institute of Electrical and Electronics Engineers. | - |
dc.rights | ©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | - |
dc.subject | In-memory computing (IMC) | - |
dc.subject | memory reliability | - |
dc.subject | memristor | - |
dc.subject | neural networks | - |
dc.subject | PageRank | - |
dc.title | Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part II: Applications and Benchmark | - |
dc.type | Article | - |
dc.identifier.email | Li, C: canl@hku.hk | - |
dc.identifier.authority | Li, C=rp02706 | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/TED.2021.3095430 | - |
dc.identifier.scopus | eid_2-s2.0-85112649356 | - |
dc.identifier.hkuros | 327480 | - |
dc.identifier.volume | 68 | - |
dc.identifier.issue | 9 | - |
dc.identifier.spage | 4379 | - |
dc.identifier.epage | 4383 | - |
dc.identifier.isi | WOS:000686761500035 | - |
dc.publisher.place | United States | - |