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- Publisher Website: 10.1109/TED.2021.3095433
- Scopus: eid_2-s2.0-85112630176
- WOS: WOS:000686761500034
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Article: Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques
Title | Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques |
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Authors | |
Keywords | Artificial intelligence (AI) in-memory computing (IMC) memory reliability memristor neural network |
Issue Date | 2021 |
Publisher | Institute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 |
Citation | IEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4373-4378 How to Cite? |
Abstract | In-memory computing (IMC) is receiving considerable interest for accelerating artificial intelligence (AI) tasks, such as neural network training and inference. However, IMC can also accelerate other machine learning (ML) and scientific computing problems, such as recommendation systems, regression, and PageRank, which are ubiquitous in datacenters. These applications typically have higher precision requirements than neural networks, which can challenge analog-based IMC and sacrifice some of the expected energy efficiency benefits. In this article, we address these challenges experimentally, presenting new techniques improving the accuracy of the solution of linear algebra problems, such as eigenvector extraction for PageRank, in a fully integrated circuit (IC) with analog resistive random access memory (RRAM) devices. Our custom redundancy algorithm can improve the programming accuracy by using multiple memory devices for representing a single matrix entry. Accuracy is further improved by error compensation with analog slicing, which allows an ever more precise value representation. |
Persistent Identifier | http://hdl.handle.net/10722/305792 |
ISSN | 2023 Impact Factor: 2.9 2023 SCImago Journal Rankings: 0.785 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Pedretti, P | - |
dc.contributor.author | Mannocci, M | - |
dc.contributor.author | Li, C | - |
dc.contributor.author | Sun, Z | - |
dc.contributor.author | Strachan, JP | - |
dc.contributor.author | Ielmini, D | - |
dc.date.accessioned | 2021-10-20T10:14:23Z | - |
dc.date.available | 2021-10-20T10:14:23Z | - |
dc.date.issued | 2021 | - |
dc.identifier.citation | IEEE Transactions on Electron Devices, 2021, v. 68 n. 9, p. 4373-4378 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | http://hdl.handle.net/10722/305792 | - |
dc.description.abstract | In-memory computing (IMC) is receiving considerable interest for accelerating artificial intelligence (AI) tasks, such as neural network training and inference. However, IMC can also accelerate other machine learning (ML) and scientific computing problems, such as recommendation systems, regression, and PageRank, which are ubiquitous in datacenters. These applications typically have higher precision requirements than neural networks, which can challenge analog-based IMC and sacrifice some of the expected energy efficiency benefits. In this article, we address these challenges experimentally, presenting new techniques improving the accuracy of the solution of linear algebra problems, such as eigenvector extraction for PageRank, in a fully integrated circuit (IC) with analog resistive random access memory (RRAM) devices. Our custom redundancy algorithm can improve the programming accuracy by using multiple memory devices for representing a single matrix entry. Accuracy is further improved by error compensation with analog slicing, which allows an ever more precise value representation. | - |
dc.language | eng | - |
dc.publisher | Institute of Electrical and Electronics Engineers. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=16 | - |
dc.relation.ispartof | IEEE Transactions on Electron Devices | - |
dc.rights | IEEE Transactions on Electron Devices. Copyright © Institute of Electrical and Electronics Engineers. | - |
dc.rights | ©20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | - |
dc.subject | Artificial intelligence (AI) | - |
dc.subject | in-memory computing (IMC) | - |
dc.subject | memory reliability | - |
dc.subject | memristor | - |
dc.subject | neural network | - |
dc.title | Redundancy and Analog Slicing for Precise In-Memory Machine Learning—Part I: Programming Techniques | - |
dc.type | Article | - |
dc.identifier.email | Li, C: canl@hku.hk | - |
dc.identifier.authority | Li, C=rp02706 | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/TED.2021.3095433 | - |
dc.identifier.scopus | eid_2-s2.0-85112630176 | - |
dc.identifier.hkuros | 327479 | - |
dc.identifier.volume | 68 | - |
dc.identifier.issue | 9 | - |
dc.identifier.spage | 4373 | - |
dc.identifier.epage | 4378 | - |
dc.identifier.isi | WOS:000686761500034 | - |
dc.publisher.place | United States | - |