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Conference Paper: Pinning-Free Edge Contact Monolayer MoS2 FET

TitlePinning-Free Edge Contact Monolayer MoS2 FET
Authors
Issue Date2020
PublisherIEEE.
Citation
2020 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 12-18 December 2020. In International Electron Devices Meeting (IEDM), 2020 How to Cite?
AbstractOne-dimensional contact (so-called edge contact) to monolayer 2D materials has been proposed for ultimate transistor scaling but reported on-state currents are much lower than those from top contact devices. Experiments in this work reveal that the fabrication processes for metal MoS2 contact strongly affect the electrical characteristics such as Schottky barrier height. Using in-situ 2D etching and metal deposition, we obtained Fermi-level pinning-free Ni-MoS2 edge contact transistor devices. Moreover, it reaches the highest on-state current among those TMDs edge contact devices reported in literatures and comparable to top-contact ones. First-principles calculation reveals the evolution of local electronic structure from strong metallization at the edge contact 'interline' (1D equivalent of 'interface') to semiconductor in the channel region. The short length (<; 3 nm) of metal-semiconductor transition and the low-dimensionality nature of the edge contact eliminate Fermi level pining. The pinning free edge contact formed through in-situ process enables 2D based high performance FET.
Persistent Identifierhttp://hdl.handle.net/10722/299187
ISSN

 

DC FieldValueLanguage
dc.contributor.authorHung, TYT-
dc.contributor.authorWang, SY-
dc.contributor.authorChuu, CP-
dc.contributor.authorChung, YY-
dc.contributor.authorChou, AS-
dc.contributor.authorHuang, FS-
dc.contributor.authorChen, T-
dc.contributor.authorLi, MY-
dc.contributor.authorCheng, CC-
dc.contributor.authorCai, J-
dc.contributor.authorChien, CH-
dc.contributor.authorChang, WH-
dc.contributor.authorWong, HSP-
dc.contributor.authorLi, LJ-
dc.date.accessioned2021-04-30T07:35:05Z-
dc.date.available2021-04-30T07:35:05Z-
dc.date.issued2020-
dc.identifier.citation2020 IEEE International Electron Devices Meeting (IEDM), San Francisco, CA, 12-18 December 2020. In International Electron Devices Meeting (IEDM), 2020-
dc.identifier.issn0163-1918-
dc.identifier.urihttp://hdl.handle.net/10722/299187-
dc.description.abstractOne-dimensional contact (so-called edge contact) to monolayer 2D materials has been proposed for ultimate transistor scaling but reported on-state currents are much lower than those from top contact devices. Experiments in this work reveal that the fabrication processes for metal MoS2 contact strongly affect the electrical characteristics such as Schottky barrier height. Using in-situ 2D etching and metal deposition, we obtained Fermi-level pinning-free Ni-MoS2 edge contact transistor devices. Moreover, it reaches the highest on-state current among those TMDs edge contact devices reported in literatures and comparable to top-contact ones. First-principles calculation reveals the evolution of local electronic structure from strong metallization at the edge contact 'interline' (1D equivalent of 'interface') to semiconductor in the channel region. The short length (<; 3 nm) of metal-semiconductor transition and the low-dimensionality nature of the edge contact eliminate Fermi level pining. The pinning free edge contact formed through in-situ process enables 2D based high performance FET.-
dc.languageeng-
dc.publisherIEEE.-
dc.relation.ispartofInternational Electron Devices Meeting (IEDM)-
dc.titlePinning-Free Edge Contact Monolayer MoS2 FET-
dc.typeConference_Paper-
dc.identifier.emailLi, LJ: lanceli1@hku.hk-
dc.identifier.authorityLi, LJ=rp02799-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1109/IEDM13553.2020.9372028-
dc.identifier.scopuseid_2-s2.0-85102950145-
dc.identifier.hkuros700003942-

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