File Download

There are no files associated with this item.

  Links for fulltext
     (May Require Subscription)
Supplementary

Article: Parallel programming of an ionic floating-gate memory array for scalable neuromorphic computing

TitleParallel programming of an ionic floating-gate memory array for scalable neuromorphic computing
Authors
Issue Date2019
Citation
Science, 2019, v. 364, n. 6440, p. 570-574 How to Cite?
Abstract© 2019 American Association for the Advancement of Science. All rights reserved. Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies.
Persistent Identifierhttp://hdl.handle.net/10722/286990
ISSN
2023 Impact Factor: 44.7
2023 SCImago Journal Rankings: 11.902
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorFuller, Elliot J.-
dc.contributor.authorKeene, Scott T.-
dc.contributor.authorMelianas, Armantas-
dc.contributor.authorWang, Zhongrui-
dc.contributor.authorAgarwal, Sapan-
dc.contributor.authorLi, Yiyang-
dc.contributor.authorTuchman, Yaakov-
dc.contributor.authorJames, Conrad D.-
dc.contributor.authorMarinella, Matthew J.-
dc.contributor.authorYang, J. Joshua-
dc.contributor.authorSalleo, Alberto-
dc.contributor.authorTalin, A. Alec-
dc.date.accessioned2020-09-07T11:46:12Z-
dc.date.available2020-09-07T11:46:12Z-
dc.date.issued2019-
dc.identifier.citationScience, 2019, v. 364, n. 6440, p. 570-574-
dc.identifier.issn0036-8075-
dc.identifier.urihttp://hdl.handle.net/10722/286990-
dc.description.abstract© 2019 American Association for the Advancement of Science. All rights reserved. Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and readout of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10-nanoampere read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array based on a polymer redox transistor connected to a conductive-bridge memory (CBM). Selective and linear programming of a redox transistor array is executed in parallel by overcoming the bridging threshold voltage of the CBMs. Synaptic weight readout with currents <10 nanoamperes is achieved by diluting the conductive polymer with an insulator to decrease the conductance. The redox transistors endure >1 billion write-read operations and support >1-megahertz write-read frequencies.-
dc.languageeng-
dc.relation.ispartofScience-
dc.titleParallel programming of an ionic floating-gate memory array for scalable neuromorphic computing-
dc.typeArticle-
dc.description.naturelink_to_OA_fulltext-
dc.identifier.doi10.1126/science.aaw5581-
dc.identifier.pmid31023890-
dc.identifier.scopuseid_2-s2.0-85065856634-
dc.identifier.volume364-
dc.identifier.issue6440-
dc.identifier.spage570-
dc.identifier.epage574-
dc.identifier.eissn1095-9203-
dc.identifier.isiWOS:000467631800039-
dc.identifier.issnl0036-8075-

Export via OAI-PMH Interface in XML Formats


OR


Export to Other Non-XML Formats