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Article: Capacitive neural network with neuro-transistors

TitleCapacitive neural network with neuro-transistors
Authors
Issue Date2018
Citation
Nature Communications, 2018, v. 9, n. 1, article no. 3208 How to Cite?
Abstract© 2018, The Author(s). Experimental demonstration of resistive neural networks has been the recent focus of hardware implementation of neuromorphic computing. Capacitive neural networks, which call for novel building blocks, provide an alternative physical embodiment of neural networks featuring a lower static power and a better emulation of neural functionalities. Here, we develop neuro-transistors by integrating dynamic pseudo-memcapacitors as the gates of transistors to produce electronic analogs of the soma and axon of a neuron, with “leaky integrate-and-fire” dynamics augmented by a signal gain on the output. Paired with non-volatile pseudo-memcapacitive synapses, a Hebbian-like learning mechanism is implemented in a capacitive switching network, leading to the observed associative learning. A prototypical fully integrated capacitive neural network is built and used to classify inputs of signals.
Persistent Identifierhttp://hdl.handle.net/10722/286971
PubMed Central ID
ISI Accession Number ID

 

DC FieldValueLanguage
dc.contributor.authorWang, Zhongrui-
dc.contributor.authorRao, Mingyi-
dc.contributor.authorHan, Jin Woo-
dc.contributor.authorZhang, Jiaming-
dc.contributor.authorLin, Peng-
dc.contributor.authorLi, Yunning-
dc.contributor.authorLi, Can-
dc.contributor.authorSong, Wenhao-
dc.contributor.authorAsapu, Shiva-
dc.contributor.authorMidya, Rivu-
dc.contributor.authorZhuo, Ye-
dc.contributor.authorJiang, Hao-
dc.contributor.authorYoon, Jung Ho-
dc.contributor.authorUpadhyay, Navnidhi Kumar-
dc.contributor.authorJoshi, Saumil-
dc.contributor.authorHu, Miao-
dc.contributor.authorStrachan, John Paul-
dc.contributor.authorBarnell, Mark-
dc.contributor.authorWu, Qing-
dc.contributor.authorWu, Huaqiang-
dc.contributor.authorQiu, Qinru-
dc.contributor.authorWilliams, R. Stanley-
dc.contributor.authorXia, Qiangfei-
dc.contributor.authorYang, J. Joshua-
dc.date.accessioned2020-09-07T11:46:09Z-
dc.date.available2020-09-07T11:46:09Z-
dc.date.issued2018-
dc.identifier.citationNature Communications, 2018, v. 9, n. 1, article no. 3208-
dc.identifier.urihttp://hdl.handle.net/10722/286971-
dc.description.abstract© 2018, The Author(s). Experimental demonstration of resistive neural networks has been the recent focus of hardware implementation of neuromorphic computing. Capacitive neural networks, which call for novel building blocks, provide an alternative physical embodiment of neural networks featuring a lower static power and a better emulation of neural functionalities. Here, we develop neuro-transistors by integrating dynamic pseudo-memcapacitors as the gates of transistors to produce electronic analogs of the soma and axon of a neuron, with “leaky integrate-and-fire” dynamics augmented by a signal gain on the output. Paired with non-volatile pseudo-memcapacitive synapses, a Hebbian-like learning mechanism is implemented in a capacitive switching network, leading to the observed associative learning. A prototypical fully integrated capacitive neural network is built and used to classify inputs of signals.-
dc.languageeng-
dc.relation.ispartofNature Communications-
dc.rightsThis work is licensed under a Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 International License.-
dc.titleCapacitive neural network with neuro-transistors-
dc.typeArticle-
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1038/s41467-018-05677-5-
dc.identifier.pmid30097585-
dc.identifier.pmcidPMC6086838-
dc.identifier.scopuseid_2-s2.0-85051526103-
dc.identifier.volume9-
dc.identifier.issue1-
dc.identifier.spagearticle no. 3208-
dc.identifier.epagearticle no. 3208-
dc.identifier.eissn2041-1723-
dc.identifier.isiWOS:000441306700004-
dc.identifier.issnl2041-1723-

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