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Article: Simulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel

TitleSimulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel
Authors
KeywordsSchrodinger equation
Quantum mechanical effects
Poisson equation
Triple-gate single electron field-effect transistor memory
Issue Date2008
Citation
Wuli Xuebao/Acta Physica Sinica, 2008, v. 57, n. 11, p. 7052-7056 How to Cite?
AbstractThis paper investigates a triple-gate single electron FET memory with a Si quantum dot floating gate and a Si quantum wire channel by establishing a numerical model of two-dimensional Schrodinger and Poisson equations. The electron concentration in the silicon quantum wire channel of different scales is investigated under conditions that diverse gate voltage and programming voltage are applied with a two-dimensional finite element solution. The influence of the quantum confinement effect and the electron distribution in the nano-scale channel on the structure is also investigated. Results of the simulation show that, the threshold voltage increases when the size of the channel decreases, and the voltage also increases as the number of electrons on the floating gate increases. However, a non-linear saturation tendency occurs when the number of injected electrons increases further, due to the high density of carriers in the nanoscale Si nanowire channel. Further research shows that the strong quantum confinement effect in the channel can effectively restrain the saturation tendency when the size of the channel is small enough. It's worth mentioning that the threshold voltage shift reflects the number of electrons stored on the floating gate. This effect implies a possibility of multi-level storage. ©2008 Chin. Phys. Soc.
Persistent Identifierhttp://hdl.handle.net/10722/265553
ISSN
2023 Impact Factor: 0.8
2023 SCImago Journal Rankings: 0.214

 

DC FieldValueLanguage
dc.contributor.authorLiu, Kui-
dc.contributor.authorDing, Hong Lin-
dc.contributor.authorZhang, Xian Gao-
dc.contributor.authorYu, Lin Wei-
dc.contributor.authorHuang, Xin Fan-
dc.contributor.authorChen, Kun Ji-
dc.date.accessioned2018-12-03T01:21:00Z-
dc.date.available2018-12-03T01:21:00Z-
dc.date.issued2008-
dc.identifier.citationWuli Xuebao/Acta Physica Sinica, 2008, v. 57, n. 11, p. 7052-7056-
dc.identifier.issn1000-3290-
dc.identifier.urihttp://hdl.handle.net/10722/265553-
dc.description.abstractThis paper investigates a triple-gate single electron FET memory with a Si quantum dot floating gate and a Si quantum wire channel by establishing a numerical model of two-dimensional Schrodinger and Poisson equations. The electron concentration in the silicon quantum wire channel of different scales is investigated under conditions that diverse gate voltage and programming voltage are applied with a two-dimensional finite element solution. The influence of the quantum confinement effect and the electron distribution in the nano-scale channel on the structure is also investigated. Results of the simulation show that, the threshold voltage increases when the size of the channel decreases, and the voltage also increases as the number of electrons on the floating gate increases. However, a non-linear saturation tendency occurs when the number of injected electrons increases further, due to the high density of carriers in the nanoscale Si nanowire channel. Further research shows that the strong quantum confinement effect in the channel can effectively restrain the saturation tendency when the size of the channel is small enough. It's worth mentioning that the threshold voltage shift reflects the number of electrons stored on the floating gate. This effect implies a possibility of multi-level storage. ©2008 Chin. Phys. Soc.-
dc.languageeng-
dc.relation.ispartofWuli Xuebao/Acta Physica Sinica-
dc.subjectSchrodinger equation-
dc.subjectQuantum mechanical effects-
dc.subjectPoisson equation-
dc.subjectTriple-gate single electron field-effect transistor memory-
dc.titleSimulation of a triple-gate single electron FET memory with a quantum dot floating gate and a quantum wire channel-
dc.typeArticle-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.scopuseid_2-s2.0-57449119194-
dc.identifier.volume57-
dc.identifier.issue11-
dc.identifier.spage7052-
dc.identifier.epage7056-
dc.identifier.issnl1000-3290-

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