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- Publisher Website: 10.1049/iet-smt.2016.0210
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Article: Graphical modelling of pinched hysteresis loops of memristors
Title | Graphical modelling of pinched hysteresis loops of memristors |
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Authors | |
Issue Date | 2016 |
Citation | IET Science, Measurement & Technology , 2016 How to Cite? |
Abstract | In this study, a graphical modelling approach of the pinched hysteresis loops exhibited by memristors is presented. This method provides a tool to emulate the hysteresis loop pinched at the origin, with the lobe area varying with the excitation frequency. The direction of the pinched hysteresis loop can be controlled. This graphical modelling method provides an alternative to describe the behaviour of memristors without deriving the coupled non-linear differential equations typically required for physical memristors. The method has been successfully applied to model the Hewlett–Packard memristor device. |
Persistent Identifier | http://hdl.handle.net/10722/246068 |
ISSN | 2023 Impact Factor: 1.4 2023 SCImago Journal Rankings: 0.438 |
ISI Accession Number ID |
DC Field | Value | Language |
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dc.contributor.author | Wang, X | - |
dc.contributor.author | Hui, SYR | - |
dc.date.accessioned | 2017-09-18T02:21:50Z | - |
dc.date.available | 2017-09-18T02:21:50Z | - |
dc.date.issued | 2016 | - |
dc.identifier.citation | IET Science, Measurement & Technology , 2016 | - |
dc.identifier.issn | 1751-8822 | - |
dc.identifier.uri | http://hdl.handle.net/10722/246068 | - |
dc.description.abstract | In this study, a graphical modelling approach of the pinched hysteresis loops exhibited by memristors is presented. This method provides a tool to emulate the hysteresis loop pinched at the origin, with the lobe area varying with the excitation frequency. The direction of the pinched hysteresis loop can be controlled. This graphical modelling method provides an alternative to describe the behaviour of memristors without deriving the coupled non-linear differential equations typically required for physical memristors. The method has been successfully applied to model the Hewlett–Packard memristor device. | - |
dc.language | eng | - |
dc.relation.ispartof | IET Science, Measurement & Technology | - |
dc.title | Graphical modelling of pinched hysteresis loops of memristors | - |
dc.type | Article | - |
dc.identifier.email | Wang, X: xmwang@eee.hku.hk | - |
dc.identifier.email | Hui, SYR: ronhui@eee.hku.hk | - |
dc.identifier.authority | Hui, SYR=rp01510 | - |
dc.identifier.doi | 10.1049/iet-smt.2016.0210 | - |
dc.identifier.scopus | eid_2-s2.0-85008958484 | - |
dc.identifier.hkuros | 276637 | - |
dc.identifier.eissn | 1751-8830 | - |
dc.identifier.isi | WOS:000396470900013 | - |
dc.identifier.issnl | 1751-8822 | - |