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Patent History
- ApplicationUS 12/3506839 2012-05-18
- PublicationUS 20120292788 2012-11-22
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Patent: Chip stacking
Title | Chip stacking |
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Priority Date | 2012-05-18 US 12/3506839 2011-05-19 US 12/1487890P |
Inventors | |
Issue Date | 2012 |
Citation | US Published patent application US 20120292788. Washington, DC: US Patent and Trademark Office (USPTO), 2012 How to Cite? |
Abstract | Methods and systems are provided to utilize and manufacture a stacked chip assembly. Microelectronic or optoelectronic chips of any dimensions are directly stacked onto each other. The chips can be of substantially identical sizes. To enable forming the stacked chip assembly, trenches are laser micro-machined onto the bottom surface of a chip to accommodate the bond wedge/ball and wire path of the chip beneath it. Consequently, chips can be tightly integrated without a gap and without having to reserve space for the bond wedges/balls. |
Persistent Identifier | http://hdl.handle.net/10722/197059 |
DC Field | Value | Language |
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dc.date.accessioned | 2014-05-07T06:51:05Z | - |
dc.date.available | 2014-05-07T06:51:05Z | - |
dc.date.issued | 2012 | - |
dc.identifier.citation | US Published patent application US 20120292788. Washington, DC: US Patent and Trademark Office (USPTO), 2012 | en_US |
dc.identifier.uri | http://hdl.handle.net/10722/197059 | - |
dc.description.abstract | Methods and systems are provided to utilize and manufacture a stacked chip assembly. Microelectronic or optoelectronic chips of any dimensions are directly stacked onto each other. The chips can be of substantially identical sizes. To enable forming the stacked chip assembly, trenches are laser micro-machined onto the bottom surface of a chip to accommodate the bond wedge/ball and wire path of the chip beneath it. Consequently, chips can be tightly integrated without a gap and without having to reserve space for the bond wedges/balls. | en_US |
dc.relation.isreferencedby | US 2012133908 (A1) 2012-05-31 | en_US |
dc.relation.isreferencedby | US 8684540 (B2) 2014-04-01 | en_US |
dc.title | Chip stacking | en_US |
dc.type | Patent | en_US |
dc.identifier.authority | CHOI HOI WAI=rp00108 | en_US |
dc.description.nature | published_or_final_version | - |
dc.contributor.inventor | CHOI HOI WAI | en_US |
patents.identifier.application | US 12/3506839 | en_US |
patents.description.assignee | CHOI HOI WAI [CN]; UNIV HONG KONG [CN] | en_US |
patents.description.country | United States of America | en_US |
patents.date.publication | 2012-11-22 | en_US |
patents.identifier.hkutechid | EEE-2010-00376-1 | - |
patents.date.application | 2012-05-18 | en_US |
patents.date.priority | 2012-05-18 US 12/3506839 | en_US |
patents.date.priority | 2011-05-19 US 12/1487890P | en_US |
patents.description.cc | us | en_US |
patents.identifier.publication | US 20120292788 | en_US |
patents.relation.family | WO 2012155858 (A1) 2012-11-22 | en_US |
patents.relation.family | CN 103650129 (A) 2014-03-19 | en_US |
patents.relation.family | KR 20140013060 (A) 2014-02-04 | en_US |
patents.description.kind | A1 | en_US |