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Article: Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric
Title | Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric |
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Authors | |
Issue Date | 2008 |
Publisher | Pergamon. The Journal's web site is located at http://www.elsevier.com/locate/microrel |
Citation | Microelectronics Reliability, 2008, v. 48 n. 4, p. 526-530 How to Cite? |
Abstract | Thin HfTiO gate dielectric is deposited by reactive co-sputtering method followed by wet or dry N2 anneal. The effects of Ti content on the performance of HfTiO gate dielectric are investigated by using different sputtering powers for the Ti target. Experimental results indicate that as the Ti content increases, the dielectric constant (κ) can increase up to 40 for a Ti content of 28%. However, when the Ti content is too high, the interface properties and gate leakage properties are deteriorated. On the contrary, results show that owing to the hydrolyzable property of GeOx, the wet-N2 anneal can greatly suppress the growth of unstable low-κ GeOx interlayer, resulting in lower interface-state density and gate leakage current, in addition to larger κ value. In this study, when the sputtering power of the Ti target is 80 W together with a 25-W power for the Hf target and a post-deposition anneal (PDA) in wet-N2 ambient at 500 °C for 300 s, excellent device performance is achieved: equivalent oxide thickness of 0.72 nm, equivalent dielectric constant of 39, interface-state density of 6.5 × 1011 eV-1 cm-2 and gate leakage current of 5.7 × 10-4 A/cm2 at Vg = 1 V. Therefore, in order to obtain high-quality HfTiO gate dielectric for small-scaled Ge MOS devices, not only should the Ti content be optimized, the PDA should also be done in a wet-N2 ambient. © 2007 Elsevier Ltd. All rights reserved. |
Persistent Identifier | http://hdl.handle.net/10722/155456 |
ISSN | 2023 Impact Factor: 1.6 2023 SCImago Journal Rankings: 0.394 |
ISI Accession Number ID | |
References |
DC Field | Value | Language |
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dc.contributor.author | Li, CX | en_HK |
dc.contributor.author | Zou, X | en_HK |
dc.contributor.author | Lai, PT | en_HK |
dc.contributor.author | Xu, JP | en_HK |
dc.contributor.author | Chan, CL | en_HK |
dc.date.accessioned | 2012-08-08T08:33:35Z | - |
dc.date.available | 2012-08-08T08:33:35Z | - |
dc.date.issued | 2008 | en_HK |
dc.identifier.citation | Microelectronics Reliability, 2008, v. 48 n. 4, p. 526-530 | en_HK |
dc.identifier.issn | 0026-2714 | en_HK |
dc.identifier.uri | http://hdl.handle.net/10722/155456 | - |
dc.description.abstract | Thin HfTiO gate dielectric is deposited by reactive co-sputtering method followed by wet or dry N2 anneal. The effects of Ti content on the performance of HfTiO gate dielectric are investigated by using different sputtering powers for the Ti target. Experimental results indicate that as the Ti content increases, the dielectric constant (κ) can increase up to 40 for a Ti content of 28%. However, when the Ti content is too high, the interface properties and gate leakage properties are deteriorated. On the contrary, results show that owing to the hydrolyzable property of GeOx, the wet-N2 anneal can greatly suppress the growth of unstable low-κ GeOx interlayer, resulting in lower interface-state density and gate leakage current, in addition to larger κ value. In this study, when the sputtering power of the Ti target is 80 W together with a 25-W power for the Hf target and a post-deposition anneal (PDA) in wet-N2 ambient at 500 °C for 300 s, excellent device performance is achieved: equivalent oxide thickness of 0.72 nm, equivalent dielectric constant of 39, interface-state density of 6.5 × 1011 eV-1 cm-2 and gate leakage current of 5.7 × 10-4 A/cm2 at Vg = 1 V. Therefore, in order to obtain high-quality HfTiO gate dielectric for small-scaled Ge MOS devices, not only should the Ti content be optimized, the PDA should also be done in a wet-N2 ambient. © 2007 Elsevier Ltd. All rights reserved. | en_HK |
dc.language | eng | en_US |
dc.publisher | Pergamon. The Journal's web site is located at http://www.elsevier.com/locate/microrel | en_HK |
dc.relation.ispartof | Microelectronics Reliability | en_HK |
dc.title | Effects of Ti content and wet-N2 anneal on Ge MOS capacitors with HfTiO gate dielectric | en_HK |
dc.type | Article | en_HK |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | en_HK |
dc.identifier.email | Xu, JP: jpxu@eee.hku.hk | en_HK |
dc.identifier.authority | Lai, PT=rp00130 | en_HK |
dc.identifier.authority | Xu, JP=rp00197 | en_HK |
dc.description.nature | link_to_subscribed_fulltext | en_US |
dc.identifier.doi | 10.1016/j.microrel.2007.11.004 | en_HK |
dc.identifier.scopus | eid_2-s2.0-42649115113 | en_HK |
dc.identifier.hkuros | 150345 | - |
dc.relation.references | http://www.scopus.com/mlt/select.url?eid=2-s2.0-42649115113&selection=ref&src=s&origin=recordpage | en_HK |
dc.identifier.volume | 48 | en_HK |
dc.identifier.issue | 4 | en_HK |
dc.identifier.spage | 526 | en_HK |
dc.identifier.epage | 530 | en_HK |
dc.identifier.isi | WOS:000256454300005 | - |
dc.publisher.place | United Kingdom | en_HK |
dc.identifier.scopusauthorid | Li, CX=22034888200 | en_HK |
dc.identifier.scopusauthorid | Zou, X=23020170400 | en_HK |
dc.identifier.scopusauthorid | Lai, PT=7202946460 | en_HK |
dc.identifier.scopusauthorid | Xu, JP=7407004696 | en_HK |
dc.identifier.scopusauthorid | Chan, CL=8507083700 | en_HK |
dc.identifier.issnl | 0026-2714 | - |