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Article: A threshold voltage model for high-k gate-dielectric MOSFETs considering fringing-field effect

TitleA threshold voltage model for high-k gate-dielectric MOSFETs considering fringing-field effect
Authors
KeywordsConformal Mapping
Fringing Field
Mosfet
Threshold Voltage
Issue Date2007
PublisherInstitute of Physics Publishing. The Journal's web site is located at http://www.iop.org/journals/cp
Citation
Chinese Physics, 2007, v. 16 n. 6, p. 1757-1763 How to Cite?
AbstractIn this paper, a threshold voltage model for high-k gate-dielectric metaloxide-semiconductor field-effect transistors (MOSFETs) is developed, with more accurate boundary conditions of the gate dielectric derived through a conformal mapping transformation method to consider the fringing-field effects including the influences of high-k gate-dielectric and sidewall spacer. Comparing with similar models, the proposed model can be applied to general situations where the gate dielectric and sidewall spacer can have different dielectric constants. The influences of sidewall spacer and high-k gate dielectric on fringing field distribution of the gate dielectric and thus threshold voltage behaviours of a MOSFET are discussed in detail. © 2007 Chin. Phys. Soc. and IOP Publishing Ltd.
Persistent Identifierhttp://hdl.handle.net/10722/155377
ISSN
References

 

DC FieldValueLanguage
dc.contributor.authorJi, Fen_US
dc.contributor.authorXu, JPen_US
dc.contributor.authorLai, PTen_US
dc.date.accessioned2012-08-08T08:33:08Z-
dc.date.available2012-08-08T08:33:08Z-
dc.date.issued2007en_US
dc.identifier.citationChinese Physics, 2007, v. 16 n. 6, p. 1757-1763en_US
dc.identifier.issn1009-1963en_US
dc.identifier.urihttp://hdl.handle.net/10722/155377-
dc.description.abstractIn this paper, a threshold voltage model for high-k gate-dielectric metaloxide-semiconductor field-effect transistors (MOSFETs) is developed, with more accurate boundary conditions of the gate dielectric derived through a conformal mapping transformation method to consider the fringing-field effects including the influences of high-k gate-dielectric and sidewall spacer. Comparing with similar models, the proposed model can be applied to general situations where the gate dielectric and sidewall spacer can have different dielectric constants. The influences of sidewall spacer and high-k gate dielectric on fringing field distribution of the gate dielectric and thus threshold voltage behaviours of a MOSFET are discussed in detail. © 2007 Chin. Phys. Soc. and IOP Publishing Ltd.en_US
dc.languageengen_US
dc.publisherInstitute of Physics Publishing. The Journal's web site is located at http://www.iop.org/journals/cpen_US
dc.relation.ispartofChinese Physicsen_US
dc.subjectConformal Mappingen_US
dc.subjectFringing Fielden_US
dc.subjectMosfeten_US
dc.subjectThreshold Voltageen_US
dc.titleA threshold voltage model for high-k gate-dielectric MOSFETs considering fringing-field effecten_US
dc.typeArticleen_US
dc.identifier.emailLai, PT:laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1088/1009-1963/16/6/047en_US
dc.identifier.scopuseid_2-s2.0-34250029871en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-34250029871&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume16en_US
dc.identifier.issue6en_US
dc.identifier.spage1757en_US
dc.identifier.epage1763en_US
dc.publisher.placeUnited Kingdomen_US
dc.identifier.scopusauthoridJi, F=8238553900en_US
dc.identifier.scopusauthoridXu, JP=7407003499en_US
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.issnl1009-1963-

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