File Download

There are no files associated with this item.

  Links for fulltext
     (May Require Subscription)
Supplementary

Article: Performance analysis of lookahead scheduling algorithm for input-buffered packet switches

TitlePerformance analysis of lookahead scheduling algorithm for input-buffered packet switches
Authors
KeywordsHead-Of-Line Blocking
Input-Buffered Switch
Packet Scheduling Algorithm
Issue Date1999
PublisherInstitute of Electronics, Information and Communication Engineers. The Journal's web site is located at http://www.ieice.or.jp/
Citation
IEICE Transactions on Communications, 1999, v. E82-B n. 8, p. 1296-1303 How to Cite?
AbstractIn this paper, an analytical model for evaluating the performance of a packet scheduling algorithm, called lookahead scheduling, is proposed. Using lookahead scheduling, each input port of a switch has B packet buffers. A packet arrives at an input port is scheduled for conflict-free transmission for up to B time slots in advance. If it cannot be scheduled for transmission in the next B slots, the packet is immediately dropped to prevent it from blocking the subsequently arrived packets. To evaluate this scheduling algorithm, we first construct a set of recursive equations for obtaining the buffer occupancy and the probability that a packet cannot be placed into a buffer. Based on that, analytical expressions for switch throughput, packet loss probability and mean packet delay are derived. Analytical results are then compared with the simulations and good agreement is found. A pipeline implementation of the lookahead scheduling is also proposed in this paper.
Persistent Identifierhttp://hdl.handle.net/10722/155092
ISSN
2023 Impact Factor: 0.7
2023 SCImago Journal Rankings: 0.246
References

 

DC FieldValueLanguage
dc.contributor.authorYeung, KLen_US
dc.contributor.authorShi, Hen_US
dc.contributor.authorLiu, NHen_US
dc.date.accessioned2012-08-08T08:31:49Z-
dc.date.available2012-08-08T08:31:49Z-
dc.date.issued1999en_US
dc.identifier.citationIEICE Transactions on Communications, 1999, v. E82-B n. 8, p. 1296-1303en_US
dc.identifier.issn0916-8516en_US
dc.identifier.urihttp://hdl.handle.net/10722/155092-
dc.description.abstractIn this paper, an analytical model for evaluating the performance of a packet scheduling algorithm, called lookahead scheduling, is proposed. Using lookahead scheduling, each input port of a switch has B packet buffers. A packet arrives at an input port is scheduled for conflict-free transmission for up to B time slots in advance. If it cannot be scheduled for transmission in the next B slots, the packet is immediately dropped to prevent it from blocking the subsequently arrived packets. To evaluate this scheduling algorithm, we first construct a set of recursive equations for obtaining the buffer occupancy and the probability that a packet cannot be placed into a buffer. Based on that, analytical expressions for switch throughput, packet loss probability and mean packet delay are derived. Analytical results are then compared with the simulations and good agreement is found. A pipeline implementation of the lookahead scheduling is also proposed in this paper.en_US
dc.languageengen_US
dc.publisherInstitute of Electronics, Information and Communication Engineers. The Journal's web site is located at http://www.ieice.or.jp/en_US
dc.relation.ispartofIEICE Transactions on Communicationsen_US
dc.subjectHead-Of-Line Blockingen_US
dc.subjectInput-Buffered Switchen_US
dc.subjectPacket Scheduling Algorithmen_US
dc.titlePerformance analysis of lookahead scheduling algorithm for input-buffered packet switchesen_US
dc.typeArticleen_US
dc.identifier.emailYeung, KL:kyeung@eee.hku.hken_US
dc.identifier.authorityYeung, KL=rp00204en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-0032596337en_US
dc.identifier.hkuros53675-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-0032596337&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volumeE82-Ben_US
dc.identifier.issue8en_US
dc.identifier.spage1296en_US
dc.identifier.epage1303en_US
dc.publisher.placeJapanen_US
dc.identifier.scopusauthoridYeung, KL=7202424908en_US
dc.identifier.scopusauthoridShi, H=35436164100en_US
dc.identifier.scopusauthoridLiu, NH=7402430988en_US
dc.identifier.issnl0916-8516-

Export via OAI-PMH Interface in XML Formats


OR


Export to Other Non-XML Formats