File Download
There are no files associated with this item.
Links for fulltext
(May Require Subscription)
- Scopus: eid_2-s2.0-0024090050
- WOS: WOS:A1988Q683400031
- Find via

Supplementary
- Citations:
- Appears in Collections:
Article: Self-aligned bipolar transistor using double thermal oxidation
| Title | Self-aligned bipolar transistor using double thermal oxidation |
|---|---|
| Authors | |
| Keywords | Bipolar devices Semiconductor devices and materials Transistors |
| Issue Date | 1988 |
| Publisher | The Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/EL |
| Citation | Electronics Letters, 1988, v. 24 n. 21, p. 1343-1345 How to Cite? |
| Abstract | A novel process is proposed to self-align the emitter and extrinsic base in a bipolar transistor. The process involves the use of double thermal oxidation and RIE to create a steep oxide emitter sidewall. The method avoids the potential problems of LPCVD oxide and can remove the residual poly on the extrinsic base, both of which lead to base-emitter shorts. It also eliminates the need for growth of adhesion oxide and annealing of LPCVD oxide. The devices thus fabricated exhibit a high current gain of 130 and high punch-through voltage of 20 V. |
| Persistent Identifier | http://hdl.handle.net/10722/154878 |
| ISSN | 2023 Impact Factor: 0.7 2023 SCImago Journal Rankings: 0.323 |
| ISI Accession Number ID |
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lai, PT | en_US |
| dc.contributor.author | Kassam, A | en_US |
| dc.contributor.author | Salama, CAT | en_US |
| dc.date.accessioned | 2012-08-08T08:31:00Z | - |
| dc.date.available | 2012-08-08T08:31:00Z | - |
| dc.date.issued | 1988 | en_US |
| dc.identifier.citation | Electronics Letters, 1988, v. 24 n. 21, p. 1343-1345 | en_US |
| dc.identifier.issn | 0013-5194 | en_US |
| dc.identifier.uri | http://hdl.handle.net/10722/154878 | - |
| dc.description.abstract | A novel process is proposed to self-align the emitter and extrinsic base in a bipolar transistor. The process involves the use of double thermal oxidation and RIE to create a steep oxide emitter sidewall. The method avoids the potential problems of LPCVD oxide and can remove the residual poly on the extrinsic base, both of which lead to base-emitter shorts. It also eliminates the need for growth of adhesion oxide and annealing of LPCVD oxide. The devices thus fabricated exhibit a high current gain of 130 and high punch-through voltage of 20 V. | en_US |
| dc.language | eng | en_US |
| dc.publisher | The Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/EL | en_US |
| dc.relation.ispartof | Electronics Letters | en_US |
| dc.subject | Bipolar devices | - |
| dc.subject | Semiconductor devices and materials | - |
| dc.subject | Transistors | - |
| dc.title | Self-aligned bipolar transistor using double thermal oxidation | en_US |
| dc.type | Article | en_US |
| dc.identifier.email | Lai, PT:laip@eee.hku.hk | en_US |
| dc.identifier.authority | Lai, PT=rp00130 | en_US |
| dc.description.nature | link_to_subscribed_fulltext | en_US |
| dc.identifier.scopus | eid_2-s2.0-0024090050 | en_US |
| dc.identifier.volume | 24 | en_US |
| dc.identifier.issue | 21 | en_US |
| dc.identifier.spage | 1343 | en_US |
| dc.identifier.epage | 1345 | en_US |
| dc.identifier.isi | WOS:A1988Q683400031 | - |
| dc.publisher.place | United Kingdom | en_US |
| dc.identifier.scopusauthorid | Lai, PT=7202946460 | en_US |
| dc.identifier.scopusauthorid | Kassam, A=36941939400 | en_US |
| dc.identifier.scopusauthorid | Salama, CAT=7004594704 | en_US |
| dc.identifier.issnl | 0013-5194 | - |
