Environment-friendly and Cost-effective Imprinted Metallization on Polymeric Substrates for Flexible Circuits


Grant Data
Project Title
Environment-friendly and Cost-effective Imprinted Metallization on Polymeric Substrates for Flexible Circuits
Principal Investigator
Professor Li, Wendi   (Project Coordinator (PC))
Co-Investigator(s)
Dr Feng Shien Ping Tony   (Co-Investigator)
Duration
17
Start Date
2018-05-02
Completion Date
2019-10-31
Amount
358456
Conference Title
Environment-friendly and Cost-effective Imprinted Metallization on Polymeric Substrates for Flexible Circuits
Keywords
Environment-friendly, Flexible Circuits, Imprinted Metallization, Polymeric Substrates
Discipline
Engineering Management
Panel
Engineering (E)
HKU Project Code
InP/108/18
Grant Type
Innovation and Technology Fund Internship Programme
Funding Year
2017
Status
Completed
Objectives
The objective of this project is to develop an environment-friendly and cost-effective method for selective metallization on polymeric films for flexible printed circuits (FPC) applications. The proposed method combines imprint lithography and electroless plating and has the potential for mass production of FPCs with minimal environmental pollution, reduced manufacturing cost, and increased production throughput. Our method is based on imprinting process using patterned imprint molds, which could pattern and transfer catalytic nanoparticles onto polymer films simultaneously. Then, circuitry patterns are formed in the imprinted structures through electroless plating. The electroless plated metallic circuit patterns are embedded in the polymer films, therefore, have superior flexibility and durability, and also improved adhesion to the substrates. Comparing to conventional FPC manufacturing process currently used in the industry, our method will eliminate a number of costly processes that generate heavy environmental pollution, such as photoresist coating, development, etching and stripping. Therefore, our method is superior to existing FPC manufacturing process with strong potential for emerging flexible consumer electronics applications. Thanks to the high patterning resolution of imprint lithography, our method also has the potential for evolving towards much narrower circuit linewidth as required by future FPCs in more compact consumer electronic devices.