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Conference Paper: FPGA-based floating-point datapath design for geometry processing

TitleFPGA-based floating-point datapath design for geometry processing
Authors
KeywordsFPGA
Floating-point
Datapath
Geometry processing
Issue Date1998
PublisherS P I E - International Society for Optical Engineering. The Journal's web site is located at http://www.spie.org/app/Publications/index.cfm?fuseaction=proceedings
Citation
Configurable Computing: Technology and Applications, Boston, Massachusetts, USA, 2-3 November 1998. In Proceedings of SPIE, 1998, v. 3526, p. 212-217 How to Cite?
AbstractGeometry processing comprises of a great many computationally intensive floating-point operations. Real- time graphics systems generally use application-specific custom designed parallel hardware to provide the high performance computation power. When designing a graphics engine on a FPGA-based configurable computing system, cost- effectiveness is important. This paper investigates and proposes a cost-effective FPGA-based floating-point datapath for geometry process. It is designed to be a basic building block for FPGA-based geometry processors. The implemented datapath operates at a frequency of 6.25 Mhz and has an average floating-point operation time of 10.2 microseconds.
Persistent Identifierhttp://hdl.handle.net/10722/46584
ISSN

 

DC FieldValueLanguage
dc.contributor.authorXing, Sen_HK
dc.contributor.authorYu, WWHen_HK
dc.date.accessioned2007-10-30T06:53:27Z-
dc.date.available2007-10-30T06:53:27Z-
dc.date.issued1998en_HK
dc.identifier.citationConfigurable Computing: Technology and Applications, Boston, Massachusetts, USA, 2-3 November 1998. In Proceedings of SPIE, 1998, v. 3526, p. 212-217-
dc.identifier.issn0277-786Xen_HK
dc.identifier.urihttp://hdl.handle.net/10722/46584-
dc.description.abstractGeometry processing comprises of a great many computationally intensive floating-point operations. Real- time graphics systems generally use application-specific custom designed parallel hardware to provide the high performance computation power. When designing a graphics engine on a FPGA-based configurable computing system, cost- effectiveness is important. This paper investigates and proposes a cost-effective FPGA-based floating-point datapath for geometry process. It is designed to be a basic building block for FPGA-based geometry processors. The implemented datapath operates at a frequency of 6.25 Mhz and has an average floating-point operation time of 10.2 microseconds.en_HK
dc.format.extent348203 bytes-
dc.format.extent3380 bytes-
dc.format.mimetypeapplication/pdf-
dc.format.mimetypetext/plain-
dc.languageengen_HK
dc.publisherS P I E - International Society for Optical Engineering. The Journal's web site is located at http://www.spie.org/app/Publications/index.cfm?fuseaction=proceedingsen_HK
dc.relation.ispartofProceedings of SPIE-
dc.rightsCopyright 1998 Society of Photo‑Optical Instrumentation Engineers (SPIE). One print or electronic copy may be made for personal use only. Systematic reproduction and distribution, duplication of any material in this publication for a fee or for commercial purposes, and modification of the contents of the publication are prohibited. This article is available online at https://doi.org/10.1117/12.327034-
dc.subjectFPGAen_HK
dc.subjectFloating-pointen_HK
dc.subjectDatapathen_HK
dc.subjectGeometry processingen_HK
dc.titleFPGA-based floating-point datapath design for geometry processingen_HK
dc.typeConference_Paperen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=0277-786X&volume=3526&spage=212&epage=217&date=1998&atitle=FPGA-based+floating-point+datapath+design+for+geometry+processingen_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.doi10.1117/12.327034en_HK
dc.identifier.scopuseid_2-s2.0-0038636456-
dc.identifier.hkuros47100-

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