File Download
There are no files associated with this item.
Links for fulltext
(May Require Subscription)
- Publisher Website: 10.1109/ULIS.2008.4527149
- Scopus: eid_2-s2.0-49049093664
Supplementary
-
Citations:
- Scopus: 0
- Appears in Collections:
Conference Paper: On the sub-nm EOT scaling of high-κ gate stacks
Title | On the sub-nm EOT scaling of high-κ gate stacks |
---|---|
Authors | |
Issue Date | 2008 |
Citation | ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon, 2008, p. 99-102 How to Cite? |
Abstract | Incorporating recent data for the Si/SiO2 and SiO 2/HfO2 interface properties, we simulate the impact of bandgap and permittivity transitions on high-κ (HK) gate-stack (GS) metal-oxide-semiconductor (MOS) devices, scaled according to the requirements for effective oxide thickness (EOT) reduction in bulk MOSFETs. Si/SiO 2 transition effects dominate, lowering the EOT, increasing over 10 times gate leakage, and shifting over 20% of electrons from the 2-fold, to the 4-fold degenerate valley. Accounting for the interface transition effects is important for accurate HKGS device characterisation and predictive modelling. © 2008 IEEE. |
Persistent Identifier | http://hdl.handle.net/10722/221311 |
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Markov, S. | - |
dc.contributor.author | Roy, S. | - |
dc.contributor.author | Fiegna, C. | - |
dc.contributor.author | Sangiorgi, E. | - |
dc.contributor.author | Asenov, A. | - |
dc.date.accessioned | 2015-11-18T06:08:58Z | - |
dc.date.available | 2015-11-18T06:08:58Z | - |
dc.date.issued | 2008 | - |
dc.identifier.citation | ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon, 2008, p. 99-102 | - |
dc.identifier.uri | http://hdl.handle.net/10722/221311 | - |
dc.description.abstract | Incorporating recent data for the Si/SiO2 and SiO 2/HfO2 interface properties, we simulate the impact of bandgap and permittivity transitions on high-κ (HK) gate-stack (GS) metal-oxide-semiconductor (MOS) devices, scaled according to the requirements for effective oxide thickness (EOT) reduction in bulk MOSFETs. Si/SiO 2 transition effects dominate, lowering the EOT, increasing over 10 times gate leakage, and shifting over 20% of electrons from the 2-fold, to the 4-fold degenerate valley. Accounting for the interface transition effects is important for accurate HKGS device characterisation and predictive modelling. © 2008 IEEE. | - |
dc.language | eng | - |
dc.relation.ispartof | ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon | - |
dc.title | On the sub-nm EOT scaling of high-κ gate stacks | - |
dc.type | Conference_Paper | - |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/ULIS.2008.4527149 | - |
dc.identifier.scopus | eid_2-s2.0-49049093664 | - |
dc.identifier.spage | 99 | - |
dc.identifier.epage | 102 | - |