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Article: Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters
Title | Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters |
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Authors | |
Keywords | Analog-to-digital converters (adcs) Hybrid filter bank (hfb) Multiplierless realization, parameter uncertainty Second-order cone programming (socp) Synthesis filter design |
Issue Date | 2009 |
Citation | IEEE Transactions On Circuits And Systems I: Regular Papers, 2009, v. 56 n. 10, p. 2221-2231 How to Cite? |
Abstract | This paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE. |
Persistent Identifier | http://hdl.handle.net/10722/73867 |
ISSN | 2023 Impact Factor: 5.2 2023 SCImago Journal Rankings: 1.836 |
ISI Accession Number ID | |
References |
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Zhao, SH | en_HK |
dc.contributor.author | Chan, SC | en_HK |
dc.date.accessioned | 2010-09-06T06:55:31Z | - |
dc.date.available | 2010-09-06T06:55:31Z | - |
dc.date.issued | 2009 | en_HK |
dc.identifier.citation | IEEE Transactions On Circuits And Systems I: Regular Papers, 2009, v. 56 n. 10, p. 2221-2231 | en_HK |
dc.identifier.issn | 1549-8328 | en_HK |
dc.identifier.uri | http://hdl.handle.net/10722/73867 | - |
dc.description.abstract | This paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE. | en_HK |
dc.language | eng | en_HK |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems I: Regular Papers | en_HK |
dc.rights | ©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. | - |
dc.subject | Analog-to-digital converters (adcs) | en_HK |
dc.subject | Hybrid filter bank (hfb) | en_HK |
dc.subject | Multiplierless realization, parameter uncertainty | en_HK |
dc.subject | Second-order cone programming (socp) | en_HK |
dc.subject | Synthesis filter design | en_HK |
dc.title | Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters | en_HK |
dc.type | Article | en_HK |
dc.identifier.email | Chan, SC:scchan@eee.hku.hk | en_HK |
dc.identifier.authority | Chan, SC=rp00094 | en_HK |
dc.description.nature | published_or_final_version | - |
dc.identifier.doi | 10.1109/TCSI.2008.2012213 | en_HK |
dc.identifier.scopus | eid_2-s2.0-75149169718 | en_HK |
dc.identifier.hkuros | 165828 | en_HK |
dc.relation.references | http://www.scopus.com/mlt/select.url?eid=2-s2.0-75149169718&selection=ref&src=s&origin=recordpage | en_HK |
dc.identifier.volume | 56 | en_HK |
dc.identifier.issue | 10 | en_HK |
dc.identifier.spage | 2221 | en_HK |
dc.identifier.epage | 2231 | en_HK |
dc.identifier.isi | WOS:000273553400007 | - |
dc.publisher.place | United States | en_HK |
dc.identifier.scopusauthorid | Zhao, SH=17436593800 | en_HK |
dc.identifier.scopusauthorid | Chan, SC=13310287100 | en_HK |
dc.identifier.issnl | 1549-8328 | - |