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Article: Design and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters

TitleDesign and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D converters
Authors
KeywordsAnalog-to-digital converters (adcs)
Hybrid filter bank (hfb)
Multiplierless realization, parameter uncertainty
Second-order cone programming (socp)
Synthesis filter design
Issue Date2009
Citation
IEEE Transactions On Circuits And Systems I: Regular Papers, 2009, v. 56 n. 10, p. 2221-2231 How to Cite?
AbstractThis paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/73867
ISSN
2015 Impact Factor: 2.393
2015 SCImago Journal Rankings: 1.394
ISI Accession Number ID
References

 

DC FieldValueLanguage
dc.contributor.authorZhao, SHen_HK
dc.contributor.authorChan, SCen_HK
dc.date.accessioned2010-09-06T06:55:31Z-
dc.date.available2010-09-06T06:55:31Z-
dc.date.issued2009en_HK
dc.identifier.citationIEEE Transactions On Circuits And Systems I: Regular Papers, 2009, v. 56 n. 10, p. 2221-2231en_HK
dc.identifier.issn1549-8328en_HK
dc.identifier.urihttp://hdl.handle.net/10722/73867-
dc.description.abstractThis paper studies the optimal least squares and minimax design and realization of digital synthesis filters for hybrid-filter-bank analog-to-digltal converters (HFB ADCs) to meet a given spurious-free dynamic range (SFDR). The problem for designing finite-impulse-response synthesis filters is formulated as a second-order cone-programming problem, which is convex and allows linear and quadratic constraints such as peak aliasing error to be incorporated. The fixed coefficients of the designed synthesis filters are efficiently implemented using sum-of-power-of-two (SOPOT) coefficients, while the internal word length used for each intermediate data is minimized using geometric programming. The main sources of error are analyzed, and a new formula of SFDR in terms of these errors is derived. The effects of component variations of analog analysis filters on the HFB ADC are also addressed by means of two new robust HFB ADC design algorithms based on stochastic uncertainty and worst case uncertainty models. Design results show that the proposed approach offers more flexibility and better performance than conventional methods in achieving a given SFDR and that the robust design algorithms are more robust to parameter uncertainties than the nominal design in which the uncertainties are not taken into account. © 2009 IEEE.en_HK
dc.languageengen_HK
dc.relation.ispartofIEEE Transactions on Circuits and Systems I: Regular Papersen_HK
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.rights©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.subjectAnalog-to-digital converters (adcs)en_HK
dc.subjectHybrid filter bank (hfb)en_HK
dc.subjectMultiplierless realization, parameter uncertaintyen_HK
dc.subjectSecond-order cone programming (socp)en_HK
dc.subjectSynthesis filter designen_HK
dc.titleDesign and multiplierless realization of digital synthesis filters for hybrid-filter-bank A/D convertersen_HK
dc.typeArticleen_HK
dc.identifier.emailChan, SC:scchan@eee.hku.hken_HK
dc.identifier.authorityChan, SC=rp00094en_HK
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.1109/TCSI.2008.2012213en_HK
dc.identifier.scopuseid_2-s2.0-75149169718en_HK
dc.identifier.hkuros165828en_HK
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-75149169718&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.volume56en_HK
dc.identifier.issue10en_HK
dc.identifier.spage2221en_HK
dc.identifier.epage2231en_HK
dc.identifier.isiWOS:000273553400007-
dc.publisher.placeUnited Statesen_HK
dc.identifier.scopusauthoridZhao, SH=17436593800en_HK
dc.identifier.scopusauthoridChan, SC=13310287100en_HK

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