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Conference Paper: Design for self-checking and self-timed datapath

TitleDesign for self-checking and self-timed datapath
Authors
KeywordsSelf-checking
aasynchronous datapath
differential cascode voltage switch logic
dynamic circuits
Issue Date2003
PublisherIEEE.
Citation
The 21st IEEE - V L S I Test Symposium Proceedings, California, USA, 27 April - 1 May 2003, p. 417-422 How to Cite?
AbstractThis work examines the inherent self-checking property of a latch-free dynamic asynchronous datapath (LFDAD) using differential cascode voltage switch logic (DCVSL). Consequently, a highly efficient self-checking (SC) dynamic asynchronous datapath architecture is presented. In this architecture, no hardware needs to be added to the datapath to achieve self-checking. The presented implementation is efficient in terms of speed and area and represents a new approach to fault-tolerant design.
Persistent Identifierhttp://hdl.handle.net/10722/46402
ISSN

 

DC FieldValueLanguage
dc.contributor.authorYang, JLen_HK
dc.contributor.authorChoy, CSen_HK
dc.contributor.authorChan, CFen_HK
dc.contributor.authorPun, KPen_HK
dc.date.accessioned2007-10-30T06:49:05Z-
dc.date.available2007-10-30T06:49:05Z-
dc.date.issued2003en_HK
dc.identifier.citationThe 21st IEEE - V L S I Test Symposium Proceedings, California, USA, 27 April - 1 May 2003, p. 417-422en_HK
dc.identifier.issn1093-0167en_HK
dc.identifier.urihttp://hdl.handle.net/10722/46402-
dc.description.abstractThis work examines the inherent self-checking property of a latch-free dynamic asynchronous datapath (LFDAD) using differential cascode voltage switch logic (DCVSL). Consequently, a highly efficient self-checking (SC) dynamic asynchronous datapath architecture is presented. In this architecture, no hardware needs to be added to the datapath to achieve self-checking. The presented implementation is efficient in terms of speed and area and represents a new approach to fault-tolerant design.en_HK
dc.format.extent616950 bytes-
dc.format.extent1735 bytes-
dc.format.mimetypeapplication/pdf-
dc.format.mimetypetext/plain-
dc.languageengen_HK
dc.publisherIEEE.en_HK
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.rights©2003 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_HK
dc.subjectSelf-checkingen_HK
dc.subjectaasynchronous datapathen_HK
dc.subjectdifferential cascode voltage switch logicen_HK
dc.subjectdynamic circuitsen_HK
dc.titleDesign for self-checking and self-timed datapathen_HK
dc.typeConference_Paperen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=1093-0167&volume=&spage=417&epage=422&date=2003&atitle=Design+for+self-checking+and+self-timed+datapathen_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.hkuros83051-

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