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Conference Paper: Efficient implementation of wideband multibeam forming network using SOPOT coefficients and multiplier block

TitleEfficient implementation of wideband multibeam forming network using SOPOT coefficients and multiplier block
Authors
Issue Date2002
PublisherIEEE.
Citation
The 14th International Conference on Digital Signal Processing, Santorini, Greece, 1-3 July 2002, v. 1, p. 243-246 How to Cite?
AbstractThis paper proposes an efficient implementation structure for the wideband multi-beamforming network in a beamspace adaptive array for wideband signals. The filter coefficients of the beamforming network are represented as sum-of-powers-to-two coefficients (SOPOT) and are implemented using the multiplier block technique. The SOPOT representation allows the coefficients to be implemented as limited number of adders and shifters without any multiplications. The redundancy in the SOPOT coefficients is further removed by the multiplier block technique to yield minimum adder realization. Design results show that significant reduction in hardware complexity can be obtained by the proposed structure as compared with the conventional direct form implementation.
Persistent Identifierhttp://hdl.handle.net/10722/46390

 

DC FieldValueLanguage
dc.contributor.authorChan, SCen_HK
dc.contributor.authorPun, KSCen_HK
dc.contributor.authorHo, KLen_HK
dc.date.accessioned2007-10-30T06:48:51Z-
dc.date.available2007-10-30T06:48:51Z-
dc.date.issued2002en_HK
dc.identifier.citationThe 14th International Conference on Digital Signal Processing, Santorini, Greece, 1-3 July 2002, v. 1, p. 243-246en_HK
dc.identifier.urihttp://hdl.handle.net/10722/46390-
dc.description.abstractThis paper proposes an efficient implementation structure for the wideband multi-beamforming network in a beamspace adaptive array for wideband signals. The filter coefficients of the beamforming network are represented as sum-of-powers-to-two coefficients (SOPOT) and are implemented using the multiplier block technique. The SOPOT representation allows the coefficients to be implemented as limited number of adders and shifters without any multiplications. The redundancy in the SOPOT coefficients is further removed by the multiplier block technique to yield minimum adder realization. Design results show that significant reduction in hardware complexity can be obtained by the proposed structure as compared with the conventional direct form implementation.en_HK
dc.format.extent589429 bytes-
dc.format.extent8028 bytes-
dc.format.extent27162 bytes-
dc.format.mimetypeapplication/pdf-
dc.format.mimetypetext/plain-
dc.format.mimetypetext/plain-
dc.languageengen_HK
dc.publisherIEEE.en_HK
dc.relation.ispartofInternational Conference on Digital Signal Processing-
dc.rights©2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_HK
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.titleEfficient implementation of wideband multibeam forming network using SOPOT coefficients and multiplier blocken_HK
dc.typeConference_Paperen_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.doi10.1109/ICDSP.2002.1027879en_HK
dc.identifier.hkuros82315-

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