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Conference Paper: Feasibility of 50-nm device manufacture by 157-nm optical lithography: an initial assessment

TitleFeasibility of 50-nm device manufacture by 157-nm optical lithography: an initial assessment
Authors
KeywordsElectronics
Issue Date2002
PublisherIEEE.
Citation
IEEE Hong Kong Electron Devices Meeting Proceedings, Hong Kong, China, 22 June 2002, p. 31-34 How to Cite?
AbstractThe normalized process latitude (NPL) is used to assess the feasibility of 50-nm device manufacture by 157-nm optical lithography. A first NPL quantification assuming steady improvement of processing technology shows that 157-nm optical lithography is infeasible. A second NPL quantification investigates the amount of technology acceleration required to make 50-nm manufacture possible. It is concluded that photolithography is a viable lithography technique for the 50-nm technology generation only with significant improvements in focus control, photomask making, photoresist contrast, as well as aberration levels.
Persistent Identifierhttp://hdl.handle.net/10722/46314

 

DC FieldValueLanguage
dc.contributor.authorPong, WTen_HK
dc.contributor.authorWong, AKKen_HK
dc.date.accessioned2007-10-30T06:47:09Z-
dc.date.available2007-10-30T06:47:09Z-
dc.date.issued2002en_HK
dc.identifier.citationIEEE Hong Kong Electron Devices Meeting Proceedings, Hong Kong, China, 22 June 2002, p. 31-34en_HK
dc.identifier.urihttp://hdl.handle.net/10722/46314-
dc.description.abstractThe normalized process latitude (NPL) is used to assess the feasibility of 50-nm device manufacture by 157-nm optical lithography. A first NPL quantification assuming steady improvement of processing technology shows that 157-nm optical lithography is infeasible. A second NPL quantification investigates the amount of technology acceleration required to make 50-nm manufacture possible. It is concluded that photolithography is a viable lithography technique for the 50-nm technology generation only with significant improvements in focus control, photomask making, photoresist contrast, as well as aberration levels.en_HK
dc.format.extent342775 bytes-
dc.format.extent5278 bytes-
dc.format.mimetypeapplication/pdf-
dc.format.mimetypetext/plain-
dc.languageengen_HK
dc.publisherIEEE.en_HK
dc.relation.ispartofIEEE Hong Kong Electron Devices Meeting Proceedings-
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.rights©2002 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_HK
dc.subjectElectronicsen_HK
dc.titleFeasibility of 50-nm device manufacture by 157-nm optical lithography: an initial assessmenten_HK
dc.typeConference_Paperen_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.doi10.1109/HKEDM.2002.1029150en_HK
dc.identifier.hkuros71713-

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