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Conference Paper: Two-layer parallel switching: A practical and survivable design for performance guaranteed optical packet switches

TitleTwo-layer parallel switching: A practical and survivable design for performance guaranteed optical packet switches
Authors
KeywordsOptical packet switch (OPS)
Parallel switching
Performance guaranteed scheduling
Reconfiguration overhead
Issue Date2005
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000308
Citation
The 2005 IEEE Global Telecommunications Conference (Globecom), St. Louis, MO., 28 November-2 December 2005. In Globecom. IEEE Global Telecommunications Conference & Exhibition Conference Record, 2005, v. 4, p. 1905-1909 How to Cite?
AbstractAn optical packet switch (OPS) is called performance guaranteed if it can achieve 100% throughput with bounded packet delay. Presently, high speedup requirement and large packet delay are two main disadvantages in designing performance guaranteed OPS. Survivability is another important issue that must be considered for real OPS implementations. In this paper, we propose a two-layer parallel OPS architecture together with an efficient scheduling scheme to address all the above issues. The tradeoff between speedup and packet delay under this new parallel architecture is also formulated to provide more design flexibility. Compared to the single-layer OPS, our proposed solution can simultaneously reduce both speedup and packet delay. For example, a delay of 4δN slots can be achieved with a speedup of 2 in our solution (where N is the switch size and δ is the switch reconfiguration overhead), whereas the single-layer OPS needs a speedup of 6 for a delay of 7δN slots. We show that this significant improvement benefits from a careful overall design rather than simply adding an extra switching layer. © 2005 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/45946
ISSN
References

 

DC FieldValueLanguage
dc.contributor.authorWu, Ben_HK
dc.contributor.authorYeung, KLen_HK
dc.contributor.authorLi, VOKen_HK
dc.date.accessioned2007-10-30T06:39:12Z-
dc.date.available2007-10-30T06:39:12Z-
dc.date.issued2005en_HK
dc.identifier.citationThe 2005 IEEE Global Telecommunications Conference (Globecom), St. Louis, MO., 28 November-2 December 2005. In Globecom. IEEE Global Telecommunications Conference & Exhibition Conference Record, 2005, v. 4, p. 1905-1909en_HK
dc.identifier.issn1054-5921en_HK
dc.identifier.urihttp://hdl.handle.net/10722/45946-
dc.description.abstractAn optical packet switch (OPS) is called performance guaranteed if it can achieve 100% throughput with bounded packet delay. Presently, high speedup requirement and large packet delay are two main disadvantages in designing performance guaranteed OPS. Survivability is another important issue that must be considered for real OPS implementations. In this paper, we propose a two-layer parallel OPS architecture together with an efficient scheduling scheme to address all the above issues. The tradeoff between speedup and packet delay under this new parallel architecture is also formulated to provide more design flexibility. Compared to the single-layer OPS, our proposed solution can simultaneously reduce both speedup and packet delay. For example, a delay of 4δN slots can be achieved with a speedup of 2 in our solution (where N is the switch size and δ is the switch reconfiguration overhead), whereas the single-layer OPS needs a speedup of 6 for a delay of 7δN slots. We show that this significant improvement benefits from a careful overall design rather than simply adding an extra switching layer. © 2005 IEEE.en_HK
dc.languageengen_HK
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000308en_HK
dc.relation.ispartofGlobecom. IEEE Global Telecommunications Conference & Exhibition Conference Recorden_HK
dc.rights©2005 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.en_HK
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.subjectOptical packet switch (OPS)en_HK
dc.subjectParallel switchingen_HK
dc.subjectPerformance guaranteed schedulingen_HK
dc.subjectReconfiguration overheaden_HK
dc.titleTwo-layer parallel switching: A practical and survivable design for performance guaranteed optical packet switchesen_HK
dc.typeConference_Paperen_HK
dc.identifier.openurlhttp://library.hku.hk:4550/resserv?sid=HKU:IR&issn=1054-5921&volume=4&spage=1905&epage=1909&date=2005&atitle=Two-layer+parallel+switching:+a+practical+and+survivable+design+for+performance+guaranteed+optical+packet+switchesen_HK
dc.identifier.emailYeung, KL: kyeung@eee.hku.hken_HK
dc.identifier.emailLi, VOK: vli@eee.hku.hken_HK
dc.identifier.authorityYeung, KL=rp00204en_HK
dc.identifier.authorityLi, VOK=rp00150en_HK
dc.description.naturepublished_or_final_versionen_HK
dc.identifier.doi10.1109/GLOCOM.2005.1577998en_HK
dc.identifier.scopuseid_2-s2.0-33846629483en_HK
dc.identifier.hkuros105095-
dc.identifier.hkuros123429-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-33846629483&selection=ref&src=s&origin=recordpageen_HK
dc.identifier.volume4en_HK
dc.identifier.spage1905en_HK
dc.identifier.epage1909en_HK
dc.identifier.scopusauthoridWu, B=24605804500en_HK
dc.identifier.scopusauthoridYeung, KL=7202424908en_HK
dc.identifier.scopusauthoridLi, VOK=7202621685en_HK
dc.customcontrol.immutablesml 151016 - merged-

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