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Article: A non-linear two-dimensional float gate transistor as a lateral inhibitory synapse for retinal early visual processing

TitleA non-linear two-dimensional float gate transistor as a lateral inhibitory synapse for retinal early visual processing
Authors
Issue Date2022
Citation
Materials Horizons, 2022, v. 9, n. 9, p. 2335-2344 How to Cite?
AbstractSynaptic transistors that accommodate concurrent signal transmission and learning in a neural network are attracting enormous interest for neuromorphic sensory processing. To remove redundant sensory information while keeping important features, artificial synaptic transistors with non-linear conductance are desired to apply filter processing to sensory inputs. Here, we report the realization of non-linear synapses using a two-dimensional van der Waals (vdW) heterostructure (MoS2/h-BN/graphene) based float gate memory device, in which the semiconductor channel is tailored via a surface acceptor (ZnPc) for subthreshold operation. In addition to usual synaptic plasticity, the memory device exhibits highly non-linear conductance (rectification ratio >106), allowing bidirectional yet only negative/inhibitory current to pass through. We demonstrate that in a lateral coupling network, such a float gate memory device resembles the key lateral inhibition function of horizontal cells for the formation of an ON-center/OFF-surround receptive field. When combined with synaptic plasticity, the lateral inhibition weights are further tunable to enable adjustable edge enhancement for early visual processing. Our results here hopefully open a new scheme toward early sensory perception via lateral inhibitory synaptic transistors.
Persistent Identifierhttp://hdl.handle.net/10722/335408
ISSN
2021 Impact Factor: 15.717
2020 SCImago Journal Rankings: 4.322

 

DC FieldValueLanguage
dc.contributor.authorHu, Man-
dc.contributor.authorYu, Jun-
dc.contributor.authorChen, Yangyang-
dc.contributor.authorWang, Siqi-
dc.contributor.authorDong, Boyi-
dc.contributor.authorWang, Han-
dc.contributor.authorHe, Yuhui-
dc.contributor.authorMa, Ying-
dc.contributor.authorZhuge, Fuwei-
dc.contributor.authorZhai, Tianyou-
dc.date.accessioned2023-11-17T08:25:40Z-
dc.date.available2023-11-17T08:25:40Z-
dc.date.issued2022-
dc.identifier.citationMaterials Horizons, 2022, v. 9, n. 9, p. 2335-2344-
dc.identifier.issn2051-6347-
dc.identifier.urihttp://hdl.handle.net/10722/335408-
dc.description.abstractSynaptic transistors that accommodate concurrent signal transmission and learning in a neural network are attracting enormous interest for neuromorphic sensory processing. To remove redundant sensory information while keeping important features, artificial synaptic transistors with non-linear conductance are desired to apply filter processing to sensory inputs. Here, we report the realization of non-linear synapses using a two-dimensional van der Waals (vdW) heterostructure (MoS2/h-BN/graphene) based float gate memory device, in which the semiconductor channel is tailored via a surface acceptor (ZnPc) for subthreshold operation. In addition to usual synaptic plasticity, the memory device exhibits highly non-linear conductance (rectification ratio >106), allowing bidirectional yet only negative/inhibitory current to pass through. We demonstrate that in a lateral coupling network, such a float gate memory device resembles the key lateral inhibition function of horizontal cells for the formation of an ON-center/OFF-surround receptive field. When combined with synaptic plasticity, the lateral inhibition weights are further tunable to enable adjustable edge enhancement for early visual processing. Our results here hopefully open a new scheme toward early sensory perception via lateral inhibitory synaptic transistors.-
dc.languageeng-
dc.relation.ispartofMaterials Horizons-
dc.titleA non-linear two-dimensional float gate transistor as a lateral inhibitory synapse for retinal early visual processing-
dc.typeArticle-
dc.description.naturelink_to_subscribed_fulltext-
dc.identifier.doi10.1039/d2mh00466f-
dc.identifier.pmid35820170-
dc.identifier.scopuseid_2-s2.0-85137126669-
dc.identifier.volume9-
dc.identifier.issue9-
dc.identifier.spage2335-
dc.identifier.epage2344-
dc.identifier.eissn2051-6355-

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