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Article: An Unified Architecture for Single, Double, Double-Extended, and Quadruple Precision Division

TitleAn Unified Architecture for Single, Double, Double-Extended, and Quadruple Precision Division
Authors
Issue Date2017
Citation
Circuits, Systems, and Signal Processing, 2017 How to Cite?
Persistent Identifierhttp://hdl.handle.net/10722/247395

 

DC FieldValueLanguage
dc.contributor.authorJaiswal, MK-
dc.contributor.authorSo, HKH-
dc.date.accessioned2017-10-18T08:26:35Z-
dc.date.available2017-10-18T08:26:35Z-
dc.date.issued2017-
dc.identifier.citationCircuits, Systems, and Signal Processing, 2017-
dc.identifier.urihttp://hdl.handle.net/10722/247395-
dc.languageeng-
dc.relation.ispartofCircuits, Systems, and Signal Processing-
dc.titleAn Unified Architecture for Single, Double, Double-Extended, and Quadruple Precision Division-
dc.typeArticle-
dc.identifier.emailJaiswal, MK: manishkj@hku.hk-
dc.identifier.emailSo, HKH: hso@eee.hku.hk-
dc.identifier.authoritySo, HKH=rp00169-
dc.identifier.doi10.1007/s00034-017-0559-9-
dc.identifier.hkuros280269-

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