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Conference Paper: UE-TCAM: an ultra efficient SRAM-based TCAM

TitleUE-TCAM: an ultra efficient SRAM-based TCAM
Authors
Issue Date2015
PublisherIEEE.
Citation
The 2015 IEEE Region 10 Conference (TENCON 2015), Macau SAR, China, 1-4 November 2015. How to Cite?
AbstractTernary content-addressable memories (TCAMs) are high speed memories; however, compared to static random- access memories (SRAMs), TCAMs suffer from low storage density, relatively slow access time, poor scalability, complexity in circuitry, and higher cost. To access the benefits of SRAM, several SRAM-based TCAMs, specifically on field-programmable gate array (FPGA) platforms, were proposed. To further improve the performance of SRAM-based TCAMs, this paper presents UE-TCAM, which reduces memory requirement, latency, power consumption, and improves speed. An example design of 512 × 36 of UE-TCAM has been implemented on Xilinx Virtex-6 FPGA. Performance evaluation confirms a significant improvement in the proposed UE-TCAM, which achieves 100% reduction in 18K B-RAMs, 74.67% reduction in SRs, 70.28% reduction in LUTs, 75.76% reduction in energy-delay product, and 60% reduction in latency and improves speed by 70.85%, compared with the available SRAM-based TCAM.
Persistent Identifierhttp://hdl.handle.net/10722/214825
ISSN

 

DC FieldValueLanguage
dc.contributor.authorUllah, Z-
dc.contributor.authorJaiswal, MK-
dc.contributor.authorCheung, RCC-
dc.contributor.authorSo, HKH-
dc.date.accessioned2015-08-21T11:57:39Z-
dc.date.available2015-08-21T11:57:39Z-
dc.date.issued2015-
dc.identifier.citationThe 2015 IEEE Region 10 Conference (TENCON 2015), Macau SAR, China, 1-4 November 2015.-
dc.identifier.issn0886-1420-
dc.identifier.urihttp://hdl.handle.net/10722/214825-
dc.description.abstractTernary content-addressable memories (TCAMs) are high speed memories; however, compared to static random- access memories (SRAMs), TCAMs suffer from low storage density, relatively slow access time, poor scalability, complexity in circuitry, and higher cost. To access the benefits of SRAM, several SRAM-based TCAMs, specifically on field-programmable gate array (FPGA) platforms, were proposed. To further improve the performance of SRAM-based TCAMs, this paper presents UE-TCAM, which reduces memory requirement, latency, power consumption, and improves speed. An example design of 512 × 36 of UE-TCAM has been implemented on Xilinx Virtex-6 FPGA. Performance evaluation confirms a significant improvement in the proposed UE-TCAM, which achieves 100% reduction in 18K B-RAMs, 74.67% reduction in SRs, 70.28% reduction in LUTs, 75.76% reduction in energy-delay product, and 60% reduction in latency and improves speed by 70.85%, compared with the available SRAM-based TCAM.-
dc.languageeng-
dc.publisherIEEE.-
dc.relation.ispartofTENCON (IEEE Region 10 Conference) Proceedings-
dc.rightsTENCON (IEEE Region 10 Conference) Proceedings. Copyright © IEEE.-
dc.rights©2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.-
dc.titleUE-TCAM: an ultra efficient SRAM-based TCAM-
dc.typeConference_Paper-
dc.identifier.emailJaiswal, MK: manishkj@hku.hk-
dc.identifier.emailSo, HKH: skhay@hkucc.hku.hk-
dc.identifier.authoritySo, HKH=rp00169-
dc.identifier.hkuros249068-
dc.publisher.placeUnited States-

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