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postgraduate thesis: A study on the dielectrics of charge-trapping flash memory devices

TitleA study on the dielectrics of charge-trapping flash memory devices
Authors
Advisors
Advisor(s):Lai, PT
Issue Date2013
PublisherThe University of Hong Kong (Pokfulam, Hong Kong)
Citation
Tao, Q. [陶庆波]. (2013). A study on the dielectrics of charge-trapping flash memory devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5177320
AbstractDiscrete charge-trapping flash memory is being developed for the next-generation commercial flash-memory applications due to its advantages over the traditional floating-gate counterpart. Currently, Si3N4 is widely used as charge-trapping layer (CTL). However, Si3N4 has low dielectric constant and small conduction-band offset with respect to the SiO2 tunneling layer, imposing limitation on further applications. Therefore, this research emphasized on investigating new dielectrics with appropriate fabrication methods to replace Si3N4 as CTL for achieving improved memory performance. Firstly, GeON CTL annealed at different temperatures was investigated. The memory device with post-deposition annealing at 600 0C exhibited the largest memory window, the best charge retention performance, and the highest reliability. These good results are due to the fact that optimal annealing temperature could suppress shallow traps and also produce new traps with desirable energy levels in the CTL. Since ZnON has a negative conduction-band offset (NCBO) with respect to Si, the traps located in the bandgap of ZnON should have deep energy levels. The memory performances of ZrON film with and without Zn doping were studied. Experimental results showed that ZrZnON film had higher program speed and better charge retention performance due to many deeper trap levels induced by the Zn doping, as well as higher erase speed due to the direct recombination of electrons at these deeper trap levels with incoming holes and the intermediary role of these deeper trap levels under erase mode. MoO3 is another NCBO dielectric with a high K value and many oxygen vacancies. La2O3, a rare-earth metal oxide, is a promising dielectric as CTL. To combine the advantages of both La2O3 and MoO3, Mo-doped La2O3 was proposed as a new CTL. Compared to the device with pure La2O3, the one with LaMoO film as CTL had significantly larger C-V hysteresis window, much higher P/E speeds, and better charge retention due to the deeper-level traps and deeper quantum wells created by the LaMoO film. Nitrogen incorporation is a popular approach to increase the trap density in the bulk of CTL. In this research, the memory performances of GdTiO films with and without nitrogen incorporation were compared. Since the nitrogen incorporation induced smaller equivalent oxide thickness, produced nitride-related traps with desirable energy level and larger cross-section for charge capture, the GdTiON film possessed better memory performance than the GdTiO film. Finally, fluorine plasma was employed to improve the quality of blocking layer. The memory device with AlOF blocking layer obtained higher program speed, better reliability and better charge retention than that based on AlO blocking layer. The improved performance was due to the fact that the fluorine incorporation passivated the defects and removed the excess oxygen in the bulk of the blocking layer. In summary, dielectric plays important roles in the performance of charge-trapping flash memory. Memory devices with GeON, ZrZnON, LaMoO, or GdTiON as charge trapping layer and AlOF as blocking layer can produce large memory window, high program/erase speed and good charge retention.
DegreeDoctor of Philosophy
SubjectFlash memories (Computers)
Dielectrics
Dept/ProgramElectrical and Electronic Engineering
Persistent Identifierhttp://hdl.handle.net/10722/196488

 

DC FieldValueLanguage
dc.contributor.advisorLai, PT-
dc.contributor.authorTao, Qingbo-
dc.contributor.author陶庆波-
dc.date.accessioned2014-04-11T23:14:30Z-
dc.date.available2014-04-11T23:14:30Z-
dc.date.issued2013-
dc.identifier.citationTao, Q. [陶庆波]. (2013). A study on the dielectrics of charge-trapping flash memory devices. (Thesis). University of Hong Kong, Pokfulam, Hong Kong SAR. Retrieved from http://dx.doi.org/10.5353/th_b5177320-
dc.identifier.urihttp://hdl.handle.net/10722/196488-
dc.description.abstractDiscrete charge-trapping flash memory is being developed for the next-generation commercial flash-memory applications due to its advantages over the traditional floating-gate counterpart. Currently, Si3N4 is widely used as charge-trapping layer (CTL). However, Si3N4 has low dielectric constant and small conduction-band offset with respect to the SiO2 tunneling layer, imposing limitation on further applications. Therefore, this research emphasized on investigating new dielectrics with appropriate fabrication methods to replace Si3N4 as CTL for achieving improved memory performance. Firstly, GeON CTL annealed at different temperatures was investigated. The memory device with post-deposition annealing at 600 0C exhibited the largest memory window, the best charge retention performance, and the highest reliability. These good results are due to the fact that optimal annealing temperature could suppress shallow traps and also produce new traps with desirable energy levels in the CTL. Since ZnON has a negative conduction-band offset (NCBO) with respect to Si, the traps located in the bandgap of ZnON should have deep energy levels. The memory performances of ZrON film with and without Zn doping were studied. Experimental results showed that ZrZnON film had higher program speed and better charge retention performance due to many deeper trap levels induced by the Zn doping, as well as higher erase speed due to the direct recombination of electrons at these deeper trap levels with incoming holes and the intermediary role of these deeper trap levels under erase mode. MoO3 is another NCBO dielectric with a high K value and many oxygen vacancies. La2O3, a rare-earth metal oxide, is a promising dielectric as CTL. To combine the advantages of both La2O3 and MoO3, Mo-doped La2O3 was proposed as a new CTL. Compared to the device with pure La2O3, the one with LaMoO film as CTL had significantly larger C-V hysteresis window, much higher P/E speeds, and better charge retention due to the deeper-level traps and deeper quantum wells created by the LaMoO film. Nitrogen incorporation is a popular approach to increase the trap density in the bulk of CTL. In this research, the memory performances of GdTiO films with and without nitrogen incorporation were compared. Since the nitrogen incorporation induced smaller equivalent oxide thickness, produced nitride-related traps with desirable energy level and larger cross-section for charge capture, the GdTiON film possessed better memory performance than the GdTiO film. Finally, fluorine plasma was employed to improve the quality of blocking layer. The memory device with AlOF blocking layer obtained higher program speed, better reliability and better charge retention than that based on AlO blocking layer. The improved performance was due to the fact that the fluorine incorporation passivated the defects and removed the excess oxygen in the bulk of the blocking layer. In summary, dielectric plays important roles in the performance of charge-trapping flash memory. Memory devices with GeON, ZrZnON, LaMoO, or GdTiON as charge trapping layer and AlOF as blocking layer can produce large memory window, high program/erase speed and good charge retention.-
dc.languageeng-
dc.publisherThe University of Hong Kong (Pokfulam, Hong Kong)-
dc.relation.ispartofHKU Theses Online (HKUTO)-
dc.rightsThe author retains all proprietary rights, (such as patent rights) and the right to use in future works.-
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.subject.lcshFlash memories (Computers)-
dc.subject.lcshDielectrics-
dc.titleA study on the dielectrics of charge-trapping flash memory devices-
dc.typePG_Thesis-
dc.identifier.hkulb5177320-
dc.description.thesisnameDoctor of Philosophy-
dc.description.thesislevelDoctoral-
dc.description.thesisdisciplineElectrical and Electronic Engineering-
dc.description.naturepublished_or_final_version-
dc.identifier.doi10.5353/th_b5177320-

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