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- Publisher Website: 10.1109/EDSSC.2013.6628064
- Scopus: eid_2-s2.0-84890447637
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Conference Paper: Zn-doped Zr oxynitride as charge-trapping layer for flash memory applications
Title | Zn-doped Zr oxynitride as charge-trapping layer for flash memory applications |
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Authors | |
Issue Date | 2013 |
Publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000853 |
Citation | The 2013 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), Hong Kong, 3-5 June 2013. In Conference Proceedings, 2013, p. 1-2 How to Cite? |
Abstract | In this work, we proposed Zn-doped Zr oxynitride (ZrZnON) as a new charge-trapping layer for flash memory applications and investigated its memory characteristics based on the capacitor structure of Al/Al2O3/ZrZnON/SiO2/Si. The high-K dielectric film, ZrON, was used as the control group. The effects of incorporating ZnO in ZrON were studied by comparing the differences of memory properties between the two charge-trapping layers. Measured data showed that the memory device containing ZrZnON had much larger C-V hysteresis window, higher programming/erasing speeds and much better charge retention properties than the one containing ZrON. These improvements should result from charge traps created by ZnO incorporation and deeper quantum wells built by the band-gap alignment of ZrZnON to the Si02 tunnel layer and Al2O3 blocking layer. |
Persistent Identifier | http://hdl.handle.net/10722/191664 |
ISBN |
DC Field | Value | Language |
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dc.contributor.author | Tao, Q | en_US |
dc.contributor.author | Lai, PT | en_US |
dc.date.accessioned | 2013-10-15T07:14:58Z | - |
dc.date.available | 2013-10-15T07:14:58Z | - |
dc.date.issued | 2013 | en_US |
dc.identifier.citation | The 2013 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), Hong Kong, 3-5 June 2013. In Conference Proceedings, 2013, p. 1-2 | en_US |
dc.identifier.isbn | 978-1-4673-2523-3 | - |
dc.identifier.uri | http://hdl.handle.net/10722/191664 | - |
dc.description.abstract | In this work, we proposed Zn-doped Zr oxynitride (ZrZnON) as a new charge-trapping layer for flash memory applications and investigated its memory characteristics based on the capacitor structure of Al/Al2O3/ZrZnON/SiO2/Si. The high-K dielectric film, ZrON, was used as the control group. The effects of incorporating ZnO in ZrON were studied by comparing the differences of memory properties between the two charge-trapping layers. Measured data showed that the memory device containing ZrZnON had much larger C-V hysteresis window, higher programming/erasing speeds and much better charge retention properties than the one containing ZrON. These improvements should result from charge traps created by ZnO incorporation and deeper quantum wells built by the band-gap alignment of ZrZnON to the Si02 tunnel layer and Al2O3 blocking layer. | - |
dc.language | eng | en_US |
dc.publisher | IEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000853 | - |
dc.relation.ispartof | IEEE Conference on Electron Devices and Solid-State Circuits Proceedings | en_US |
dc.title | Zn-doped Zr oxynitride as charge-trapping layer for flash memory applications | en_US |
dc.type | Conference_Paper | en_US |
dc.identifier.email | Lai, PT: laip@eee.hku.hk | en_US |
dc.identifier.authority | Lai, PT=rp00130 | en_US |
dc.description.nature | link_to_subscribed_fulltext | - |
dc.identifier.doi | 10.1109/EDSSC.2013.6628064 | - |
dc.identifier.scopus | eid_2-s2.0-84890447637 | - |
dc.identifier.hkuros | 226083 | en_US |
dc.identifier.spage | 1 | - |
dc.identifier.epage | 2 | - |
dc.publisher.place | United States | en_US |
dc.customcontrol.immutable | sml 131108 | - |