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Article: Low-power divide-by-3 injection-locked frequency dividers implemented with injection transformers

TitleLow-power divide-by-3 injection-locked frequency dividers implemented with injection transformers
Authors
Issue Date2009
PublisherThe Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/EL
Citation
Electronics Letters, 2009, v. 45 n. 5, p. 240-241 How to Cite?
AbstractA new divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD consists of a 7.6GHz voltage controlled oscillator (VCO) and two transformers, which are in series with the cross-coupled transistors in the VCO for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.13m CMOS technology. At the supply voltage of 0.8 V, the core power consumption is 1.25mW, and the free-running frequency of the ILFD is tunable from 7.2 to 7.87GHz. At the input power of 0dBm, the total divide-by-3 locking range is from 21.56 to 23.63GHz as the tuning voltage is varied from 0.0 to 0.8 V. The phase noise of the locked ILFD output is lower than that of the free-running ILFD in the divide-by-3 mode. © 2009 The Institution of Engineering and Technology.
Persistent Identifierhttp://hdl.handle.net/10722/175580
ISSN
2015 Impact Factor: 0.854
2015 SCImago Journal Rankings: 0.549
ISI Accession Number ID
References

 

DC FieldValueLanguage
dc.contributor.authorJang, SLen_US
dc.contributor.authorChang, CWen_US
dc.contributor.authorCheng, WCen_US
dc.contributor.authorLee, CFen_US
dc.contributor.authorJuang, MHen_US
dc.date.accessioned2012-11-26T08:59:47Z-
dc.date.available2012-11-26T08:59:47Z-
dc.date.issued2009en_US
dc.identifier.citationElectronics Letters, 2009, v. 45 n. 5, p. 240-241en_US
dc.identifier.issn0013-5194en_US
dc.identifier.urihttp://hdl.handle.net/10722/175580-
dc.description.abstractA new divide-by-3 injection-locked frequency divider (ILFD) is proposed. The ILFD consists of a 7.6GHz voltage controlled oscillator (VCO) and two transformers, which are in series with the cross-coupled transistors in the VCO for signal injection. The proposed CMOS ILFD has been implemented with the TSMC 0.13m CMOS technology. At the supply voltage of 0.8 V, the core power consumption is 1.25mW, and the free-running frequency of the ILFD is tunable from 7.2 to 7.87GHz. At the input power of 0dBm, the total divide-by-3 locking range is from 21.56 to 23.63GHz as the tuning voltage is varied from 0.0 to 0.8 V. The phase noise of the locked ILFD output is lower than that of the free-running ILFD in the divide-by-3 mode. © 2009 The Institution of Engineering and Technology.en_US
dc.languageengen_US
dc.publisherThe Institution of Engineering and Technology. The Journal's web site is located at http://www.ieedl.org/ELen_US
dc.relation.ispartofElectronics Lettersen_US
dc.titleLow-power divide-by-3 injection-locked frequency dividers implemented with injection transformersen_US
dc.typeArticleen_US
dc.identifier.emailLee, CF: leecf@hkucc.hku.hken_US
dc.identifier.authorityLee, CF=rp00139en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1049/el:20092027en_US
dc.identifier.scopuseid_2-s2.0-61349126586en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-61349126586&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume45en_US
dc.identifier.issue5en_US
dc.identifier.spage240en_US
dc.identifier.epage241en_US
dc.identifier.isiWOS:000263785600002-
dc.publisher.placeUnited Kingdomen_US
dc.identifier.scopusauthoridJang, SL=7402218984en_US
dc.identifier.scopusauthoridChang, CW=35253488500en_US
dc.identifier.scopusauthoridCheng, WC=35200292400en_US
dc.identifier.scopusauthoridLee, CF=8068602600en_US
dc.identifier.scopusauthoridJuang, MH=7005765390en_US

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