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Conference Paper: Effects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La2O3 gate dielectric

TitleEffects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La2O3 gate dielectric
Authors
KeywordsFluorine
High-k dielectric
Interfacial layer
Lanthanum oxide
MOS
Issue Date2011
PublisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000853
Citation
The 2011 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), Tianjin; China, 17-18 November 2011. In Conference Proceedings, 2011, p. 1-2 How to Cite?
AbstractIn this work, the effects of fluorine incorporation by using plasma on the electrical properties of Si MOS capacitor with La2O3 gate dielectric are investigated. From the capacitance-voltage (C-V) curve and gate leakage current, it is demonstrated that the F-plasma treatment can effectively suppress the growth of interfacial layer, and thus improve the electrical properties of the device in terms of accumulation capacitance, interface-state density and breakdown voltage. © 2011 IEEE.
Persistent Identifierhttp://hdl.handle.net/10722/158773
ISBN
References

 

DC FieldValueLanguage
dc.contributor.authorQian, LXen_US
dc.contributor.authorHuang, XDen_US
dc.contributor.authorLai, PTen_US
dc.date.accessioned2012-08-08T09:01:16Z-
dc.date.available2012-08-08T09:01:16Z-
dc.date.issued2011en_US
dc.identifier.citationThe 2011 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), Tianjin; China, 17-18 November 2011. In Conference Proceedings, 2011, p. 1-2en_US
dc.identifier.isbn978-1-4577-1997-4-
dc.identifier.urihttp://hdl.handle.net/10722/158773-
dc.description.abstractIn this work, the effects of fluorine incorporation by using plasma on the electrical properties of Si MOS capacitor with La2O3 gate dielectric are investigated. From the capacitance-voltage (C-V) curve and gate leakage current, it is demonstrated that the F-plasma treatment can effectively suppress the growth of interfacial layer, and thus improve the electrical properties of the device in terms of accumulation capacitance, interface-state density and breakdown voltage. © 2011 IEEE.en_US
dc.languageengen_US
dc.publisherIEEE. The Journal's web site is located at http://ieeexplore.ieee.org/xpl/conhome.jsp?punumber=1000853-
dc.relation.ispartofIEEE Conference on Electron Devices and Solid-State Circuits Proceedingsen_US
dc.rightsIEEE Conference on Electron Devices and Solid-State Circuits Proceedings. Copyright © IEEE.-
dc.rights©2011 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.-
dc.rightsCreative Commons: Attribution 3.0 Hong Kong License-
dc.subjectFluorineen_US
dc.subjectHigh-k dielectricen_US
dc.subjectInterfacial layeren_US
dc.subjectLanthanum oxideen_US
dc.subjectMOSen_US
dc.titleEffects of fluorine incorporation on the electrical properties of silicon MOS capacitor with La2O3 gate dielectricen_US
dc.typeConference_Paperen_US
dc.identifier.emailLai, PT: laip@eee.hku.hken_US
dc.identifier.authorityLai, PT=rp00130en_US
dc.description.naturepublished_or_final_versionen_US
dc.identifier.doi10.1109/EDSSC.2011.6117657en_US
dc.identifier.scopuseid_2-s2.0-84856090025en_US
dc.identifier.hkuros225766-
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-84856090025&selection=ref&src=s&origin=recordpageen_US
dc.identifier.spage1-
dc.identifier.epage2-
dc.publisher.placeUnited States-
dc.identifier.scopusauthoridLai, PT=7202946460en_US
dc.identifier.scopusauthoridHuang, XD=37057428400en_US
dc.identifier.scopusauthoridQian, LX=54913300700en_US
dc.customcontrol.immutablesml 131106-

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