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Conference Paper: Interconnect performance and scaling strategy for the 22 nm node and beyond

TitleInterconnect performance and scaling strategy for the 22 nm node and beyond
Authors
Issue Date2009
Citation
Advanced Metallization Conference (Amc), 2009, p. 83-90 How to Cite?
AbstractAfter four decades of continuous scaling on the CMOS technology, many innovations have been realized for improving interconnects RC performance since the emergence of copper. However, wire resistance has become a dominant factor on interconnect RC performance at the 22nm node. Optimization of metal aspect ratio and barrier thickness are important directions for mitigating the increase of wire resistance. In addition to reducing the dielectric constant of the ULK MD, reducing the dielectric constant of the copper capping layer and the transitional layer of the ULK MD are approaches for lowering the parasitic capacitance. In order to further boost interconnect performance, an air-gap integration is an option for reducing the capacitance without scaling metal thickness. Therefore, conventional scaling can be extended to the next generation. © 2009 Materials Research Society.
Persistent Identifierhttp://hdl.handle.net/10722/158597
ISSN
References

 

DC FieldValueLanguage
dc.contributor.authorChen, JHCen_US
dc.contributor.authorJiang, Len_US
dc.contributor.authorDeutsch, Aen_US
dc.contributor.authorAngyal, MSen_US
dc.contributor.authorSpooner, TAen_US
dc.date.accessioned2012-08-08T09:00:24Z-
dc.date.available2012-08-08T09:00:24Z-
dc.date.issued2009en_US
dc.identifier.citationAdvanced Metallization Conference (Amc), 2009, p. 83-90en_US
dc.identifier.issn1540-1766en_US
dc.identifier.urihttp://hdl.handle.net/10722/158597-
dc.description.abstractAfter four decades of continuous scaling on the CMOS technology, many innovations have been realized for improving interconnects RC performance since the emergence of copper. However, wire resistance has become a dominant factor on interconnect RC performance at the 22nm node. Optimization of metal aspect ratio and barrier thickness are important directions for mitigating the increase of wire resistance. In addition to reducing the dielectric constant of the ULK MD, reducing the dielectric constant of the copper capping layer and the transitional layer of the ULK MD are approaches for lowering the parasitic capacitance. In order to further boost interconnect performance, an air-gap integration is an option for reducing the capacitance without scaling metal thickness. Therefore, conventional scaling can be extended to the next generation. © 2009 Materials Research Society.en_US
dc.languageengen_US
dc.relation.ispartofAdvanced Metallization Conference (AMC)en_US
dc.titleInterconnect performance and scaling strategy for the 22 nm node and beyonden_US
dc.typeConference_Paperen_US
dc.identifier.emailJiang, L:ljiang@eee.hku.hken_US
dc.identifier.authorityJiang, L=rp01338en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.scopuseid_2-s2.0-70349975593en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-70349975593&selection=ref&src=s&origin=recordpageen_US
dc.identifier.spage83en_US
dc.identifier.epage90en_US
dc.publisher.placeUnited Statesen_US
dc.identifier.scopusauthoridChen, JHC=35277277600en_US
dc.identifier.scopusauthoridJiang, L=36077777200en_US
dc.identifier.scopusauthoridDeutsch, A=7102025083en_US
dc.identifier.scopusauthoridAngyal, MS=6604046842en_US
dc.identifier.scopusauthoridSpooner, TA=6603786868en_US

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