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Conference Paper: Forbidden area avoidance with spacing technique for layout optimization

TitleForbidden area avoidance with spacing technique for layout optimization
Authors
KeywordsLayout Optimization
Photolithography
Resolution Enhancement Technique
Subresolution Assist Features
Issue Date2004
PublisherS P I E - International Society for Optical Engineering. The Journal's web site is located at http://spie.org/x1848.xml
Citation
Proceedings Of Spie - The International Society For Optical Engineering, 2004, v. 5379, p. 67-75 How to Cite?
AbstractThe use of subresolution assist features (SRAFs) in the photo mask is one of resolution enhancement techniques in photolithography, which can minimize linewidth variation caused by proximity effect. However, the process latitude with SRAFs through various pitches is not uniform. From the point of view of lithography, pitches with low process latitude, called forbidden areas, should be avoided. These forbidden areas exist often in the layout after routing since they are larger than the minimum clearance required in the design rules. In this paper, a pitch optimization method applied in the post-routing phase is proposed to avoid the forbidden areas. Experimental data of lithography techniques and geometric constraints from the layout are formulated into a constrained quadratic optimization problem. By using the spacing technique, wire segments in the affected area are adjusted to their new locations obtained from solving the optimization problem by quadratic programming. Examples show that the proposed method can avoid most forbidden areas in the layout after normal routing.
Persistent Identifierhttp://hdl.handle.net/10722/158428
ISSN
References

 

DC FieldValueLanguage
dc.contributor.authorShi, Sen_US
dc.contributor.authorWong, AKen_US
dc.contributor.authorNg, TSen_US
dc.date.accessioned2012-08-08T08:59:34Z-
dc.date.available2012-08-08T08:59:34Z-
dc.date.issued2004en_US
dc.identifier.citationProceedings Of Spie - The International Society For Optical Engineering, 2004, v. 5379, p. 67-75en_US
dc.identifier.issn0277-786Xen_US
dc.identifier.urihttp://hdl.handle.net/10722/158428-
dc.description.abstractThe use of subresolution assist features (SRAFs) in the photo mask is one of resolution enhancement techniques in photolithography, which can minimize linewidth variation caused by proximity effect. However, the process latitude with SRAFs through various pitches is not uniform. From the point of view of lithography, pitches with low process latitude, called forbidden areas, should be avoided. These forbidden areas exist often in the layout after routing since they are larger than the minimum clearance required in the design rules. In this paper, a pitch optimization method applied in the post-routing phase is proposed to avoid the forbidden areas. Experimental data of lithography techniques and geometric constraints from the layout are formulated into a constrained quadratic optimization problem. By using the spacing technique, wire segments in the affected area are adjusted to their new locations obtained from solving the optimization problem by quadratic programming. Examples show that the proposed method can avoid most forbidden areas in the layout after normal routing.en_US
dc.languageengen_US
dc.publisherS P I E - International Society for Optical Engineering. The Journal's web site is located at http://spie.org/x1848.xmlen_US
dc.relation.ispartofProceedings of SPIE - The International Society for Optical Engineeringen_US
dc.subjectLayout Optimizationen_US
dc.subjectPhotolithographyen_US
dc.subjectResolution Enhancement Techniqueen_US
dc.subjectSubresolution Assist Featuresen_US
dc.titleForbidden area avoidance with spacing technique for layout optimizationen_US
dc.typeConference_Paperen_US
dc.identifier.emailNg, TS:tsng@eee.hku.hken_US
dc.identifier.authorityNg, TS=rp00159en_US
dc.description.naturelink_to_subscribed_fulltexten_US
dc.identifier.doi10.1117/12.533640en_US
dc.identifier.scopuseid_2-s2.0-2942640096en_US
dc.relation.referenceshttp://www.scopus.com/mlt/select.url?eid=2-s2.0-2942640096&selection=ref&src=s&origin=recordpageen_US
dc.identifier.volume5379en_US
dc.identifier.spage67en_US
dc.identifier.epage75en_US
dc.publisher.placeUnited Statesen_US
dc.identifier.scopusauthoridShi, S=7402200809en_US
dc.identifier.scopusauthoridWong, AK=7403147663en_US
dc.identifier.scopusauthoridNg, TS=7402229975en_US

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