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Conference Paper: CONCURRENT VLSI ARCHITECTURE FOR COVARIANCE-LATTICE COMPUTATIONS IN MAXIMUM ENTROPY SPECTRUM ESTIMATION.
Title | CONCURRENT VLSI ARCHITECTURE FOR COVARIANCE-LATTICE COMPUTATIONS IN MAXIMUM ENTROPY SPECTRUM ESTIMATION. |
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Authors | |
Issue Date | 1985 |
Citation | Iere Conference Proceedings, 1985 n. 62, p. 287-292 How to Cite? |
Abstract | The availability of low cost, high performance (VLSI) circuits has allowed the computation of complex algorithms to be laid on silicon producing cost effective and high throughput systems for real time signal processing applications. This paper presents the design and implementation of a concurrent VLSI architecture to compute the covariance-lattice method in maximum entropy spectrum estimation. The approach taken in this work correlates the well defined lattice structure of the algorithm with the VLSI requirements by deriving a highly recursive architectural style which maps into the recursivity of the algorithm. |
Persistent Identifier | http://hdl.handle.net/10722/157981 |
ISSN |
DC Field | Value | Language |
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dc.contributor.author | Makhlouf, MAR | en_US |
dc.contributor.author | Goutis, CE | en_US |
dc.contributor.author | Yung, HC | en_US |
dc.contributor.author | Allen, CR | en_US |
dc.date.accessioned | 2012-08-08T08:57:34Z | - |
dc.date.available | 2012-08-08T08:57:34Z | - |
dc.date.issued | 1985 | en_US |
dc.identifier.citation | Iere Conference Proceedings, 1985 n. 62, p. 287-292 | en_US |
dc.identifier.issn | 0538-0006 | en_US |
dc.identifier.uri | http://hdl.handle.net/10722/157981 | - |
dc.description.abstract | The availability of low cost, high performance (VLSI) circuits has allowed the computation of complex algorithms to be laid on silicon producing cost effective and high throughput systems for real time signal processing applications. This paper presents the design and implementation of a concurrent VLSI architecture to compute the covariance-lattice method in maximum entropy spectrum estimation. The approach taken in this work correlates the well defined lattice structure of the algorithm with the VLSI requirements by deriving a highly recursive architectural style which maps into the recursivity of the algorithm. | en_US |
dc.language | eng | en_US |
dc.relation.ispartof | IERE Conference Proceedings | en_US |
dc.title | CONCURRENT VLSI ARCHITECTURE FOR COVARIANCE-LATTICE COMPUTATIONS IN MAXIMUM ENTROPY SPECTRUM ESTIMATION. | en_US |
dc.type | Conference_Paper | en_US |
dc.identifier.email | Yung, HC:nyung@eee.hku.hk | en_US |
dc.identifier.authority | Yung, HC=rp00226 | en_US |
dc.description.nature | link_to_subscribed_fulltext | en_US |
dc.identifier.scopus | eid_2-s2.0-0021945028 | en_US |
dc.identifier.issue | 62 | en_US |
dc.identifier.spage | 287 | en_US |
dc.identifier.epage | 292 | en_US |
dc.identifier.scopusauthorid | Makhlouf, MAR=7005209308 | en_US |
dc.identifier.scopusauthorid | Goutis, CE=7005520150 | en_US |
dc.identifier.scopusauthorid | Yung, HC=7003473369 | en_US |
dc.identifier.scopusauthorid | Allen, CR=7402266059 | en_US |
dc.identifier.issnl | 0538-0006 | - |